From 868112e9fc9c80e836ec1864e9fa675d5a60faa6 Mon Sep 17 00:00:00 2001 From: Ash Wolf Date: Sat, 21 Dec 2019 11:09:58 +0000 Subject: [PATCH] flesh out Etna skeleton a bit more --- WindCore/emu.cpp | 2 +- WindCore/emu.h | 2 ++ WindCore/etna.cpp | 13 +++++++++---- WindCore/etna.h | 7 ++++++- WindCore/wind_hw.h | 4 ++++ 5 files changed, 22 insertions(+), 6 deletions(-) diff --git a/WindCore/emu.cpp b/WindCore/emu.cpp index a37fb14..d815224 100644 --- a/WindCore/emu.cpp +++ b/WindCore/emu.cpp @@ -6,7 +6,7 @@ #define INCLUDE_BANK1 -Emu::Emu() { +Emu::Emu() : etna(this) { } diff --git a/WindCore/emu.h b/WindCore/emu.h index 0962fc7..3a97c4c 100644 --- a/WindCore/emu.h +++ b/WindCore/emu.h @@ -5,6 +5,7 @@ #include class Emu { +public: uint8_t ROM[0x1000000]; uint8_t MemoryBlockC0[0x800000]; uint8_t MemoryBlockC1[0x800000]; @@ -12,6 +13,7 @@ class Emu { uint8_t MemoryBlockD1[0x800000]; enum { MemoryBlockMask = 0x7FFFFF }; +private: uint32_t controlReg; uint32_t translationTableBase; uint32_t domainAccessControl; diff --git a/WindCore/etna.cpp b/WindCore/etna.cpp index 5e15d2f..0356d52 100644 --- a/WindCore/etna.cpp +++ b/WindCore/etna.cpp @@ -1,4 +1,5 @@ #include "etna.h" +#include "emu.h" #include #include @@ -44,7 +45,9 @@ static const char *nameReg(uint32_t reg) { } -Etna::Etna() { +Etna::Etna(Emu *owner) { + this->owner = owner; + for (int i = 0; i < 0x80; i++) prom[i] = 0; @@ -77,9 +80,10 @@ Etna::Etna() { uint32_t Etna::readReg8(uint32_t reg) { if (!promReadActive) - printf("ETNA readReg8: reg=%s\n", nameReg(reg)); + printf("ETNA readReg8: reg=%s @ pc=%08x,lr=%08x\n", nameReg(reg), owner->getGPR(15) - 4, owner->getGPR(14)); switch (reg) { - case regSktVarA0: return 0; // will store some status flags + case regIntClear: return 0; + case regSktVarA0: return 1; // will store some status flags case regSktVarA1: return 0; // will store some more status flags case regWake1: return wake1; case regWake2: return wake2; @@ -97,8 +101,9 @@ uint32_t Etna::readReg32(uint32_t reg) void Etna::writeReg8(uint32_t reg, uint8_t value) { if (!promReadActive) - printf("ETNA writeReg8: reg=%s value=%02x\n", nameReg(reg), value); + printf("ETNA writeReg8: reg=%s value=%02x @ pc=%08x,lr=%08x\n", nameReg(reg), value, owner->getGPR(15) - 4, owner->getGPR(14)); switch (reg) { + case regIntClear: pendingInterrupts &= ~value; break; case regWake1: wake1 = value; break; case regWake2: wake2 = value; break; } diff --git a/WindCore/etna.h b/WindCore/etna.h index 7e83a4f..ae63b02 100644 --- a/WindCore/etna.h +++ b/WindCore/etna.h @@ -1,16 +1,21 @@ #pragma once #include +class Emu; + class Etna { uint8_t prom[0x80] = {}; uint16_t promReadAddress = 0, promReadValue = 0; bool promReadActive = false; int promAddressBitsReceived = 0; + uint8_t pendingInterrupts = 0, interruptMask = 0; uint8_t wake1 = 0, wake2 = 0; + Emu *owner; + public: - Etna(); + Etna(Emu *owner); uint32_t readReg8(uint32_t reg); uint32_t readReg32(uint32_t reg); diff --git a/WindCore/wind_hw.h b/WindCore/wind_hw.h index ed4c9a3..6ff4624 100644 --- a/WindCore/wind_hw.h +++ b/WindCore/wind_hw.h @@ -1,5 +1,6 @@ #pragma once #include "wind.h" +#include "arm.h" #include struct Timer { @@ -113,6 +114,9 @@ struct UART { if (reg == (UART0FCR & 0xFF)) { return frameControl; // UART0LCR + } else if (reg == (UART0FLG & 0xFF)) { + // we pretend we are never busy, never have full fifo + return FlagReceiveFifoEmpty; } else { printf("unhandled 32bit uart read %x at pc=%08x lr=%08x\n", reg, cpu->gprs[ARM_PC], cpu->gprs[ARM_LR]); return 0xFFFFFFFF;