mirror of https://github.com/Treeki/WindEmu.git
158 lines
3.9 KiB
C
158 lines
3.9 KiB
C
#pragma once
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#include "wind.h"
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#include "arm710t.h"
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#include <stdio.h>
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struct Timer {
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ARM710T *cpu;
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enum {
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TICK_INTERVAL_SLOW = CLOCK_SPEED / 2000,
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TICK_INTERVAL_FAST = CLOCK_SPEED / 512000,
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MODE_512KHZ = 1<<3,
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PERIODIC = 1<<6,
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ENABLED = 1<<7
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};
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int64_t lastTicked;
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uint8_t config;
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uint32_t interval;
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int32_t value;
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int tickInterval() const {
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return (config & MODE_512KHZ) ? TICK_INTERVAL_FAST : TICK_INTERVAL_SLOW;
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}
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void load(uint32_t lval) {
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interval = lval;
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value = lval;
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}
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bool tick(int64_t cycles) {
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if (cycles >= (lastTicked + tickInterval())) {
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lastTicked += tickInterval();
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if (config & ENABLED) {
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--value;
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if (value == 0) {
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if (config & PERIODIC)
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value = interval;
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return true;
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}
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}
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}
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return false;
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}
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void dump() {
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printf("enabled=%s periodic=%s interval=%d value=%d\n",
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(config & ENABLED) ? "true" : "false",
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(config & PERIODIC) ? "true" : "false",
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interval, value
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);
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}
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};
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struct UART {
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ARM710T *cpu;
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enum {
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IntRx = 1,
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IntTx = 2,
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IntModemStatus = 4,
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PortCtrlEnable = 1,
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PortCtrlSirEnable = 2,
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PortCtrlIrdaTx = 4,
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FrameCtrlBreak = 1,
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FrameCtrlParityEnable = 2,
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FrameCtrlEvenParity = 4,
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FrameCtrlExtraStopBit = 8,
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FrameCtrlUFifoEn = 0x10,
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FrameCtrlWrdLenMask = 0x60,
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FrameCtrlWlen5 = 0,
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FrameCtrlWlen6 = 0x20,
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FrameCtrlWlen7 = 0x40,
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FrameCtrlWlen8 = 0x60,
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RecvFrameError = 0x100,
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RecvParityError = 0x200,
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RecvOverrunError = 0x400,
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FlagClearToSend = 1,
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FlagDataSetReady = 2,
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FlagDataCarrierDetect = 4,
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FlagBusy = 8,
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FlagReceiveFifoEmpty = 0x10,
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FlagTransmitFifoFull = 0x20
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};
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uint8_t portControl = 0;
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uint8_t frameControl = 0;
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uint8_t interrupts = 0, interruptMask = 0;
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// UART0DATA = 0x600, byte write, long read
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// UART0FCR = 0x604, long
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// UART0LCR = 0x608, long
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// UART0CON = 0x60C, byte
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// UART0FLG = 0x610, byte
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// UART0INT = 0x614, long write, byte read
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// UART0INTM = 0x618, byte
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// UART0INTR = 0x61C, byte
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// UART0TEST1 = 0x620,
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// UART0TEST2 = 0x624,
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// UART0TEST3 = 0x628,
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uint32_t readReg8(uint32_t reg) {
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// UART0DATA
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if (reg == (UART0CON & 0xFF)) {
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return portControl;
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} else if (reg == (UART0FLG & 0xFF)) {
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// we pretend we are never busy, never have full fifo
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return FlagReceiveFifoEmpty;
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// UART0INT?
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// UART0INTM?
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// UART0INTR?
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} else {
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printf("unhandled 8bit uart read %x at pc=%08x lr=%08x\n", reg, cpu->getGPR(15), cpu->getGPR(14));
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return 0xFF;
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}
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}
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uint32_t readReg32(uint32_t reg) {
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// UART0DATA
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if (reg == (UART0FCR & 0xFF)) {
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return frameControl;
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// UART0LCR
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} else if (reg == (UART0FLG & 0xFF)) {
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// we pretend we are never busy, never have full fifo
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return FlagReceiveFifoEmpty;
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} else {
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printf("unhandled 32bit uart read %x at pc=%08x lr=%08x\n", reg, cpu->getGPR(15), cpu->getGPR(14));
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return 0xFFFFFFFF;
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}
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}
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void writeReg8(uint32_t reg, uint8_t value) {
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// UART0DATA
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if (reg == (UART0CON & 0xFF)) {
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portControl = value;
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printf("portcon updated: enable=%d sirenable=%d irdatx=%d\n", value&1, value&2, value&4);
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} else if (reg == (UART0INTM & 0xFF)) {
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interruptMask = value;
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printf("uart interruptmask updated: %d\n", value);
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// UART0INTR?
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} else {
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printf("unhandled 8bit uart write %x value %02x at pc=%08x lr=%08x\n", reg, value, cpu->getGPR(15), cpu->getGPR(14));
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}
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}
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void writeReg32(uint32_t reg, uint32_t value) {
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if (reg == (UART0FCR & 0xFF)) {
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frameControl = value;
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printf("frameControl updated: break=%d parityEn=%d evenParity=%d extraStop=%d ufifoEn=%d wrdLen=%d\n",
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value&1,
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value&2,
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value&4,
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value&8,
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value&0x10,
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((value&0x60)>>5)+5);
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} else if (reg == (UART0LCR & 0xFF)) {
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printf("** uart writing lcr %x **\n", value);
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} else if (reg == (UART0INT & 0xFF)) {
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printf("uart interrupts %x -> %x\n", interrupts, value);
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interrupts = value;
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} else {
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printf("unhandled 32bit uart write %x value %08x at pc=%08x lr=%08x\n", reg, value, cpu->getGPR(15), cpu->getGPR(14));
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}
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}
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};
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