dm: Simple Watchdog uclass
This is a simple uclass for Watchdog Timers. It has four operations: start, restart, reset, stop. Drivers must implement start, restart and stop operations, while implementing reset is optional: It's default implementation expires watchdog timer in one clock tick. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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committed by
Tom Rini
parent
17c5fb1953
commit
0753bc2d30
@@ -42,4 +42,5 @@ obj-$(CONFIG_TIMER) += timer.o
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obj-$(CONFIG_DM_VIDEO) += video.o
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obj-$(CONFIG_ADC) += adc.o
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obj-$(CONFIG_SPMI) += spmi.o
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obj-$(CONFIG_WDT) += wdt.o
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endif
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40
test/dm/wdt.c
Normal file
40
test/dm/wdt.c
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@@ -0,0 +1,40 @@
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/*
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* Copyright 2017 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <wdt.h>
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#include <asm/state.h>
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#include <asm/test.h>
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#include <dm/test.h>
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#include <test/ut.h>
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/* Test that watchdog driver functions are called */
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static int dm_test_wdt_base(struct unit_test_state *uts)
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{
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struct sandbox_state *state = state_get_current();
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struct udevice *dev;
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const u64 timeout = 42;
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ut_assertok(uclass_get_device(UCLASS_WDT, 0, &dev));
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ut_asserteq(0, state->wdt.counter);
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ut_asserteq(false, state->wdt.running);
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ut_assertok(wdt_start(dev, timeout, 0));
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ut_asserteq(timeout, state->wdt.counter);
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ut_asserteq(true, state->wdt.running);
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uint reset_count = state->wdt.reset_count;
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ut_assertok(wdt_reset(dev));
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ut_asserteq(reset_count + 1, state->wdt.reset_count);
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ut_asserteq(true, state->wdt.running);
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ut_assertok(wdt_stop(dev));
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ut_asserteq(false, state->wdt.running);
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return 0;
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}
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DM_TEST(dm_test_wdt_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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