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arm64: mvebu: Fix A8K memory mapping and add documentation

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Fix the MMU mapping for A8K device family:
 - Separate A7K and A8K memory mappings
 - Fix memory regions by including IO mapping for all
   3 PCIe interfaces existing on each connected CP110 controller
Add A8K memory mapping documentation with all regions
configured by Marvell ATF.

Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
This commit is contained in:
Konstantin Porotchkin
2016-12-19 17:04:42 +02:00
committed by Stefan Roese
parent 0bd1f96aa2
commit 0d92f2141a
2 changed files with 101 additions and 13 deletions
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56
doc/mvebu/armada-8k-memory.txt Normal file
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Memory Layout on Armada-8k SoC's
================================
The below desribes the physical memory layout for Marvell's Armada-8k SoC's.
This assumes that the SoC includes Dual CP configuration, in case the flavor is using
a single CP configuration, then all secondary-CP mappings are invalid.
All "Reserved" areas below, are kept for future usage.
Start End Use
--------------------------------------------------------------------------
0x00000000 0xEFFFFFFF DRAM
0xF0000000 0xF0FFFFFF AP Internal registers space
0xF1000000 0xF1FFFFFF Reserved.
0xF2000000 0xF3FFFFFF CP-0 Internal (configuration) registers
space.
0xF4000000 0xF5FFFFFF CP-1 Internal (configuration) registers
space.
0xF6000000 0xF6FFFFFF CP-0 / PCIe#0 Memory space.
0xF7000000 0xF7FFFFFF CP-0 / PCIe#1 Memory space.
0xF8000000 0xF8FFFFFF CP-0 / PCIe#2 Memory space.
0xF9000000 0xF900FFFF CP-0 / PCIe#0 IO space.
0xF9010000 0xF901FFFF CP-0 / PCIe#1 IO space.
0xF9020000 0xF902FFFF CP-0 / PCIe#2 IO space.
0xF9030000 0xF9FFFFFF Reserved.
0xFA000000 0xFAFFFFFF CP-1 / PCIe#0 Memory space.
0xFB000000 0xFBFFFFFF CP-1 / PCIe#1 Memory space.
0xFC000000 0xFCFFFFFF CP-1 / PCIe#2 Memory space.
0xFD000000 0xFD00FFFF CP-1 / PCIe#0 IO space.
0xFD010000 0xFD01FFFF CP-1 / PCIe#1 IO space.
0xFD020000 0xFD02FFFF CP-1 / PCIe#2 IO space.
0xFD030000 0xFFEFFFFF Reserved.
0xFFF00000 0xFFFFFFFF Bootrom
0x100000000 <DRAM Size>-1 DRAM