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Merge git://www.denx.de/git/u-boot-marvell

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Mostly including the Armada 37xx pinctrl / gpio driver.
This commit is contained in:
Tom Rini
2017-05-31 22:27:54 -04:00
parent 221a949eb6 6cbf7eda3c
commit 1b87f9538f
17 changed files with 852 additions and 130 deletions
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8
arch/arm/dts/armada-3720-db.dts
View File

@@ -81,11 +81,15 @@
};
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
status = "okay";
phy-mode = "rgmii";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
@@ -117,6 +121,8 @@
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
spi-flash@0 {
#address-cells = <1>;
@@ -130,6 +136,8 @@
/* Exported on the micro USB connector CON32 through an FTDI */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};

73
arch/arm/dts/armada-37xx.dtsi
View File

@@ -106,6 +106,79 @@
status = "disabled";
};
pinctrl_nb: pinctrl-nb@13800 {
compatible = "marvell,armada3710-nb-pinctrl",
"syscon", "simple-mfd";
reg = <0x13800 0x100>, <0x13C00 0x20>;
gpionb: gpionb {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_nb 0 0 36>;
gpio-controller;
interrupts =
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
};
spi_quad_pins: spi-quad-pins {
groups = "spi_quad";
function = "spi";
};
i2c1_pins: i2c1-pins {
groups = "i2c1";
function = "i2c";
};
i2c2_pins: i2c2-pins {
groups = "i2c2";
function = "i2c";
};
uart1_pins: uart1-pins {
groups = "uart1";
function = "uart";
};
uart2_pins: uart2-pins {
groups = "uart2";
function = "uart";
};
};
pinctrl_sb: pinctrl-sb@18800 {
compatible = "marvell,armada3710-sb-pinctrl",
"syscon", "simple-mfd";
reg = <0x18800 0x100>, <0x18C00 0x20>;
gpiosb: gpiosb {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_sb 0 0 29>;
gpio-controller;
interrupts =
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
};
rgmii_pins: mii-pins {
groups = "rgmii";
function = "mii";
};
};
usb3: usb@58000 {
compatible = "marvell,armada3700-xhci",
"generic-xhci";

8
arch/arm/dts/armada-7040-db.dts
View File

@@ -169,8 +169,7 @@
};
phy2 {
phy-type = <PHY_TYPE_SGMII0>;
phy-speed = <PHY_SPEED_1_25G>;
phy-type = <PHY_TYPE_SFI>;
};
phy3 {
@@ -224,6 +223,11 @@
status = "okay";
};
&cpm_eth0 {
status = "okay";
phy-mode = "sfi"; /* lane-2 */
};
&cpm_eth1 {
status = "okay";
phy = <&phy0>;

68
arch/arm/mach-mvebu/arm64-common.c
View File

@@ -46,75 +46,17 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
/* DRAM init code ... */
static const void *get_memory_reg_prop(const void *fdt, int *lenp)
int dram_init_banksize(void)
{
int offset;
offset = fdt_path_offset(fdt, "/memory");
if (offset < 0)
return NULL;
return fdt_getprop(fdt, offset, "reg", lenp);
}
int dram_init(void)
{
const void *fdt = gd->fdt_blob;
const fdt32_t *val;
int ac, sc, len;
ac = fdt_address_cells(fdt, 0);
sc = fdt_size_cells(fdt, 0);
if (ac < 0 || sc < 1 || sc > 2) {
printf("invalid address/size cells\n");
return -EINVAL;
}
val = get_memory_reg_prop(fdt, &len);
if (len / sizeof(*val) < ac + sc)
return -EINVAL;
val += ac;
gd->ram_size = fdtdec_get_number(val, sc);
debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
fdtdec_setup_memory_banksize();
return 0;
}
int dram_init_banksize(void)
int dram_init(void)
{
const void *fdt = gd->fdt_blob;
const fdt32_t *val;
int ac, sc, cells, len, i;
val = get_memory_reg_prop(fdt, &len);
if (len < 0)
return -ENXIO;
ac = fdt_address_cells(fdt, 0);
sc = fdt_size_cells(fdt, 0);
if (ac < 1 || ac > 2 || sc < 1 || sc > 2) {
printf("invalid address/size cells\n");
return -ENXIO;
}
cells = ac + sc;
len /= sizeof(*val);
for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
i++, len -= cells) {
gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
val += ac;
gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
val += sc;
debug("DRAM bank %d: start = %08lx, size = %08lx\n",
i, (unsigned long)gd->bd->bi_dram[i].start,
(unsigned long)gd->bd->bi_dram[i].size);
}
if (fdtdec_setup_memory_size() != 0)
return -EINVAL;
return 0;
}