* Patch by Rishi Bhattacharya, 08 May 2004:
Add support for TI OMAP5912 OSK Board * Patch by Sam Song May, 07 May 2004: Fix typo of UPM table for rmu board
This commit is contained in:
wdenk
@@ -38,8 +38,8 @@
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#define PCM_RESYNC_CMD_CH_A 0x42
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#define PCM_RESYNC_CMD_CH_B 0x4A
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#define ACTIVE_HOOK_LEV_4 0
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#define ACTIVE_HOOK_LEV_12 1
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#define ACTIVE_HOOK_LEV_4 0
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#define ACTIVE_HOOK_LEV_12 1
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#define SLIC_P_NORMAL 0x01
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@@ -140,17 +140,17 @@
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#define CIS_DAT_ADDR 0x00
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#define LEC_LEN_ADDR 0x3A
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#define LEC_POWR_ADDR 0x3B
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#define LEC_DELP_ADDR 0x3C
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#define LEC_DELQ_ADDR 0x3D
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#define LEC_GAIN_XI_ADDR 0x3E
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#define LEC_GAIN_RI_ADDR 0x3F
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#define LEC_GAIN_XO_ADDR 0x40
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#define LEC_RES_1_ADDR 0x41
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#define LEC_LEN_ADDR 0x3A
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#define LEC_POWR_ADDR 0x3B
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#define LEC_DELP_ADDR 0x3C
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#define LEC_DELQ_ADDR 0x3D
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#define LEC_GAIN_XI_ADDR 0x3E
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#define LEC_GAIN_RI_ADDR 0x3F
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#define LEC_GAIN_XO_ADDR 0x40
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#define LEC_RES_1_ADDR 0x41
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#define LEC_RES_2_ADDR 0x42
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#define NLP_POW_LPF_ADDR 0x30
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#define NLP_POW_LPF_ADDR 0x30
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#define NLP_POW_LPS_ADDR 0x31
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#define NLP_BN_LEV_X_ADDR 0x32
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#define NLP_BN_LEV_R_ADDR 0x33
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@@ -170,18 +170,18 @@
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#define NLP_CT_LEV_RE_ADDR 0x41
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#define NLP_CTRL_ADDR 0x42
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#define UTD_CF_H_ADDR 0x4B
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#define UTD_CF_L_ADDR 0x4C
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#define UTD_BW_H_ADDR 0x4D
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#define UTD_BW_L_ADDR 0x4E
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#define UTD_NLEV_ADDR 0x4F
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#define UTD_SLEV_H_ADDR 0x50
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#define UTD_SLEV_L_ADDR 0x51
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#define UTD_DELT_ADDR 0x52
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#define UTD_RBRK_ADDR 0x53
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#define UTD_RTIME_ADDR 0x54
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#define UTD_EBRK_ADDR 0x55
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#define UTD_ETIME_ADDR 0x56
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#define UTD_CF_H_ADDR 0x4B
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#define UTD_CF_L_ADDR 0x4C
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#define UTD_BW_H_ADDR 0x4D
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#define UTD_BW_L_ADDR 0x4E
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#define UTD_NLEV_ADDR 0x4F
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#define UTD_SLEV_H_ADDR 0x50
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#define UTD_SLEV_L_ADDR 0x51
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#define UTD_DELT_ADDR 0x52
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#define UTD_RBRK_ADDR 0x53
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#define UTD_RTIME_ADDR 0x54
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#define UTD_EBRK_ADDR 0x55
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#define UTD_ETIME_ADDR 0x56
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#define DTMF_LEV_ADDR 0x30
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#define DTMF_TWI_ADDR 0x31
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@@ -205,45 +205,45 @@
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/*=====================================*/
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#define HOOK_LEV_ACT_START_ADDR 0x89
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#define HOOK_LEV_ACT_START_ADDR 0x89
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#define RO1_START_ADDR 0x70
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#define RO2_START_ADDR 0x95
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#define RO3_START_ADDR 0x96
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#define TG1_FREQ_START_ADDR 0x38
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#define TG1_GAIN_START_ADDR 0x39
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#define TG1_BANDPASS_START_ADDR 0x3B
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#define TG1_BANDPASS_START_ADDR 0x3B
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#define TG1_BANDPASS_END_ADDR 0x3D
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#define TG2_FREQ_START_ADDR 0x40
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#define TG2_GAIN_START_ADDR 0x41
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#define TG2_BANDPASS_START_ADDR 0x43
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#define TG2_BANDPASS_START_ADDR 0x43
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#define TG2_BANDPASS_END_ADDR 0x45
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/*====================================*/
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#define PCM_HW_B 0x80
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#define PCM_HW_B 0x80
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#define PCM_HW_A 0x00
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#define PCM_TIME_SLOT_0 0x00 /* Byte 0 of PCM Frame (by default is assigned to channel A ) */
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#define PCM_TIME_SLOT_1 0x01 /* Byte 1 of PCM Frame (by default is assigned to channel B ) */
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#define PCM_TIME_SLOT_4 0x04 /* Byte 4 of PCM Frame (Corresponds to B1 of the Second GCI ) */
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#define PCM_TIME_SLOT_0 0x00 /* Byte 0 of PCM Frame (by default is assigned to channel A ) */
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#define PCM_TIME_SLOT_1 0x01 /* Byte 1 of PCM Frame (by default is assigned to channel B ) */
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#define PCM_TIME_SLOT_4 0x04 /* Byte 4 of PCM Frame (Corresponds to B1 of the Second GCI ) */
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#define RX_LEV_ADDR 0x28
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#define TX_LEV_ADDR 0x30
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#define Ik1_ADDR 0x83
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#define Ik1_ADDR 0x83
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#define AR_ROW 3 /* Is the row (AR Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
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#define AX_ROW 6 /* Is the row (AX Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
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#define DCF_ROW 0 /* Is the row (DCF Params) of the dc_Coeff array in SMS_CODEC_Defaults struct */
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#define AR_ROW 3 /* Is the row (AR Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
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#define AX_ROW 6 /* Is the row (AX Params) of the ac_Coeff array in SMS_CODEC_Defaults struct */
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#define DCF_ROW 0 /* Is the row (DCF Params) of the dc_Coeff array in SMS_CODEC_Defaults struct */
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/* Mark the start byte of Duslic parameters that we use with configurator */
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#define Ik1_START_BYTE 3
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#define Ik1_START_BYTE 3
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#define RX_LEV_START_BYTE 0
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#define TX_LEV_START_BYTE 0
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/************************************************/
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#define INTREG4_CIS_ACT (1 << 0)
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#define INTREG4_CIS_ACT (1 << 0)
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#define BCR1_SLEEP 0x20
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#define BCR1_REVPOL 0x10
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@@ -257,30 +257,30 @@
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#define BCR2_HIMAN 0x08
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#define BCR2_PDOT 0x01
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#define BCR3_PCMX_EN (1 << 4)
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#define BCR3_PCMX_EN (1 << 4)
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#define BCR5_DTMF_EN (1 << 0)
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#define BCR5_DTMF_SRC (1 << 1)
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#define BCR5_LEC_EN (1 << 2)
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#define BCR5_LEC_OUT (1 << 3)
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#define BCR5_CIS_EN (1 << 4)
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#define BCR5_CIS_AUTO (1 << 5)
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#define BCR5_UTDX_EN (1 << 6)
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#define BCR5_UTDR_EN (1 << 7)
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#define BCR5_DTMF_EN (1 << 0)
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#define BCR5_DTMF_SRC (1 << 1)
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#define BCR5_LEC_EN (1 << 2)
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#define BCR5_LEC_OUT (1 << 3)
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#define BCR5_CIS_EN (1 << 4)
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#define BCR5_CIS_AUTO (1 << 5)
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#define BCR5_UTDX_EN (1 << 6)
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#define BCR5_UTDR_EN (1 << 7)
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#define DSCR_TG1_EN (1 << 0)
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#define DSCR_TG2_EN (1 << 1)
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#define DSCR_PTG (1 << 2)
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#define DSCR_COR8 (1 << 3)
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#define DSCR_DG_KEY(x) (((x) & 0x0F) << 4)
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#define DSCR_TG1_EN (1 << 0)
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#define DSCR_TG2_EN (1 << 1)
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#define DSCR_PTG (1 << 2)
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#define DSCR_COR8 (1 << 3)
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#define DSCR_DG_KEY(x) (((x) & 0x0F) << 4)
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#define CIS_LEC_MODE_CIS_V23 (1 << 0)
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#define CIS_LEC_MODE_CIS_FRM (1 << 1)
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#define CIS_LEC_MODE_NLP_EN (1 << 2)
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#define CIS_LEC_MODE_UTDR_SUM (1 << 4)
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#define CIS_LEC_MODE_UTDX_SUM (1 << 5)
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#define CIS_LEC_MODE_CIS_V23 (1 << 0)
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#define CIS_LEC_MODE_CIS_FRM (1 << 1)
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#define CIS_LEC_MODE_NLP_EN (1 << 2)
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#define CIS_LEC_MODE_UTDR_SUM (1 << 4)
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#define CIS_LEC_MODE_UTDX_SUM (1 << 5)
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#define CIS_LEC_MODE_LEC_FREEZE (1 << 6)
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#define CIS_LEC_MODE_LEC_ADAPT (1 << 7)
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#define CIS_LEC_MODE_LEC_ADAPT (1 << 7)
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#define TSTR4_COR_64 (1 << 5)
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@@ -290,12 +290,12 @@
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#define LMCR1_TEST_EN (1 << 7)
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#define LMCR1_LM_EN (1 << 6)
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#define LMCR1_LM_EN (1 << 6)
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#define LMCR1_LM_THM (1 << 5)
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#define LMCR1_LM_ONCE (1 << 2)
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#define LMCR1_LM_ONCE (1 << 2)
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#define LMCR1_LM_MASK (1 << 1)
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#define LMCR2_LM_RECT (1 << 5)
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#define LMCR2_LM_RECT (1 << 5)
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#define LMCR2_LM_SEL_VDD 0x0D
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#define LMCR2_LM_SEL_IO3 0x0A
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#define LMCR2_LM_SEL_IO4 0x0B
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@@ -313,27 +313,27 @@
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/************************************************/
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#define TARGET_ONHOOK_BATH_x100 4600 /* 46.0 Volt */
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#define TARGET_ONHOOK_BATL_x100 2500 /* 25.0 Volt */
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#define TARGET_ONHOOK_BATL_x100 2500 /* 25.0 Volt */
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#define TARGET_V_DIVIDER_RATIO_x100 21376L /* (R1+R2)/R2 = 213.76 */
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#define DIVIDER_RATIO_ACCURx100 (22 * 100)
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#define V_AD_x10000 10834L /* VAD = 1.0834 */
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#define TARGET_VDDx100 330 /* VDD = 3.3 * 10 */
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#define VDD_MAX_DIFFx100 20 /* VDD Accur = 0.2*100 */
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#define RMS_MULTIPLIERx100 111 /* pi/(2xsqrt(2)) = 1.11*/
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#define K_INTDC_RECT_ON 4 /* When Rectifier is ON this value is necessary(2^4) */
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#define K_INTDC_RECT_OFF 2 /* 2^2 */
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#define RNG_FREQ 25
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#define SAMPLING_FREQ (2000L)
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#define N_SAMPLES (SAMPLING_FREQ/RNG_FREQ) /* for Ring Freq =25Hz (40ms Integration Period)[Sampling rate 2KHz -->1 Sample every 500us] */
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#define HOOK_THRESH_RING_START_ADDR 0x8B
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#define RING_PARAMS_START_ADDR 0x70
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#define RMS_MULTIPLIERx100 111 /* pi/(2xsqrt(2)) = 1.11*/
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#define K_INTDC_RECT_ON 4 /* When Rectifier is ON this value is necessary(2^4) */
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#define K_INTDC_RECT_OFF 2 /* 2^2 */
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#define RNG_FREQ 25
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#define SAMPLING_FREQ (2000L)
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#define N_SAMPLES (SAMPLING_FREQ/RNG_FREQ) /* for Ring Freq =25Hz (40ms Integration Period)[Sampling rate 2KHz -->1 Sample every 500us] */
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#define HOOK_THRESH_RING_START_ADDR 0x8B
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#define RING_PARAMS_START_ADDR 0x70
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#define V_OUT_BATH_MAX_DIFFx100 300 /* 3.0 x100 */
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#define V_OUT_BATL_MAX_DIFFx100 400 /* 4.0 x100 */
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#define MAX_V_RING_MEANx100 50
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#define TARGET_V_RING_RMSx100 2720
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#define V_RMS_RING_MAX_DIFFx100 250
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#define MAX_V_RING_MEANx100 50
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#define TARGET_V_RING_RMSx100 2720
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#define V_RMS_RING_MAX_DIFFx100 250
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#define LM_OK_SRC_IRG_2 (1 << 4)
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@@ -624,97 +624,106 @@ unsigned short codsp_read_cop_short(int duslic_id, int channel, unsigned char ad
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/****************************************************************************/
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#define MAX_POP_BLOCK 50
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#define MAX_POP_BLOCK 50
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void codsp_write_pop_block(int duslic_id, int channel, unsigned char addr, const unsigned char *block, int len)
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void codsp_write_pop_block (int duslic_id, int channel, unsigned char addr,
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const unsigned char *block, int len)
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{
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unsigned char cmd[2 + MAX_POP_BLOCK];
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if (len > MAX_POP_BLOCK) /* truncate */
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len = MAX_POP_BLOCK;
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if (len > MAX_POP_BLOCK) /* truncate */
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len = MAX_POP_BLOCK;
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = addr;
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memcpy(cmd + 2, block, len);
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codsp_send(duslic_id, cmd, 2 + len, 0, 0);
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memcpy (cmd + 2, block, len);
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codsp_send (duslic_id, cmd, 2 + len, 0, 0);
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}
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void codsp_write_pop_char(int duslic_id, int channel, unsigned char regno, unsigned char val)
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void codsp_write_pop_char (int duslic_id, int channel, unsigned char regno,
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unsigned char val)
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{
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unsigned char cmd[3];
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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cmd[2] = val;
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codsp_send(duslic_id, cmd, 3, 0, 0);
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codsp_send (duslic_id, cmd, 3, 0, 0);
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}
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void codsp_write_pop_short(int duslic_id, int channel, unsigned char regno, unsigned short val)
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void codsp_write_pop_short (int duslic_id, int channel, unsigned char regno,
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unsigned short val)
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{
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unsigned char cmd[4];
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_WR | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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cmd[2] = (unsigned char)(val >> 8);
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cmd[3] = (unsigned char)val;
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cmd[2] = (unsigned char) (val >> 8);
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cmd[3] = (unsigned char) val;
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codsp_send(duslic_id, cmd, 4, 0, 0);
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codsp_send (duslic_id, cmd, 4, 0, 0);
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}
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void codsp_write_pop_int(int duslic_id, int channel, unsigned char regno, unsigned int val)
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void codsp_write_pop_int (int duslic_id, int channel, unsigned char regno,
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unsigned int val)
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{
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unsigned char cmd[5];
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cmd[0] = CODSP_WR | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_WR | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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cmd[2] = (unsigned char)(val >> 24);
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cmd[3] = (unsigned char)(val >> 16);
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cmd[4] = (unsigned char)(val >> 8);
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cmd[5] = (unsigned char)val;
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cmd[2] = (unsigned char) (val >> 24);
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cmd[3] = (unsigned char) (val >> 16);
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cmd[4] = (unsigned char) (val >> 8);
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cmd[5] = (unsigned char) val;
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codsp_send(duslic_id, cmd, 6, 0, 0);
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codsp_send (duslic_id, cmd, 6, 0, 0);
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}
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unsigned char codsp_read_pop_char(int duslic_id, int channel, unsigned char regno)
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unsigned char codsp_read_pop_char (int duslic_id, int channel,
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unsigned char regno)
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{
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unsigned char cmd[3];
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unsigned char res[2];
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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codsp_send(duslic_id, cmd, 2, res, 2);
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codsp_send (duslic_id, cmd, 2, res, 2);
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return res[1];
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}
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unsigned short codsp_read_pop_short(int duslic_id, int channel, unsigned char regno)
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unsigned short codsp_read_pop_short (int duslic_id, int channel,
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unsigned char regno)
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{
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unsigned char cmd[2];
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unsigned char res[3];
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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codsp_send(duslic_id, cmd, 2, res, 3);
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codsp_send (duslic_id, cmd, 2, res, 3);
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return ((unsigned short)res[1] << 8) | res[2];
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return ((unsigned short) res[1] << 8) | res[2];
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}
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unsigned int codsp_read_pop_int(int duslic_id, int channel, unsigned char regno)
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unsigned int codsp_read_pop_int (int duslic_id, int channel,
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unsigned char regno)
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{
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unsigned char cmd[2];
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unsigned char res[5];
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR(channel) | CODSP_CMD_POP;
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cmd[0] = CODSP_RD | CODSP_OP | CODSP_ADR (channel) | CODSP_CMD_POP;
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cmd[1] = regno;
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codsp_send(duslic_id, cmd, 2, res, 5);
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codsp_send (duslic_id, cmd, 2, res, 5);
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return ((unsigned int)res[1] << 24) | ((unsigned int)res[2] << 16) | ((unsigned int)res[3] << 8) | res[4];
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return (((unsigned int) res[1] << 24) |
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((unsigned int) res[2] << 16) |
|
||||
((unsigned int) res[3] << 8) |
|
||||
res[4] );
|
||||
}
|
||||
|
||||
/****************************************************************************/
|
||||
|
||||
struct _coeffs {
|
||||
@@ -725,12 +734,12 @@ struct _coeffs {
|
||||
struct _coeffs ac_coeffs[11] = {
|
||||
{ 0x60, {0xAD,0xDA,0xB5,0x9B,0xC7,0x2A,0x9D,0x00} }, /* 0x60 IM-Filter part 1 */
|
||||
{ 0x68, {0x10,0x00,0xA9,0x82,0x0D,0x77,0x0A,0x00} }, /* 0x68 IM-Filter part 2 */
|
||||
{ 0x18, {0x08,0xC0,0xD2,0xAB,0xA5,0xE2,0xAB,0x07} }, /* 0x18 FRR-Filter */
|
||||
{ 0x28, {0x44,0x93,0xF5,0x92,0x88,0x00,0x00,0x00} }, /* 0x28 AR-Filter */
|
||||
{ 0x48, {0x96,0x38,0x29,0x96,0xC9,0x2B,0x8B,0x00} }, /* 0x48 LPR-Filter */
|
||||
{ 0x20, {0x08,0xB0,0xDA,0x9D,0xA7,0xFA,0x93,0x06} }, /* 0x20 FRX-Filter */
|
||||
{ 0x30, {0xBA,0xAC,0x00,0x01,0x85,0x50,0xC0,0x1A} }, /* 0x30 AX-Filter */
|
||||
{ 0x50, {0x96,0x38,0x29,0xF5,0xFA,0x2B,0x8B,0x00} }, /* 0x50 LPX-Filter */
|
||||
{ 0x18, {0x08,0xC0,0xD2,0xAB,0xA5,0xE2,0xAB,0x07} }, /* 0x18 FRR-Filter */
|
||||
{ 0x28, {0x44,0x93,0xF5,0x92,0x88,0x00,0x00,0x00} }, /* 0x28 AR-Filter */
|
||||
{ 0x48, {0x96,0x38,0x29,0x96,0xC9,0x2B,0x8B,0x00} }, /* 0x48 LPR-Filter */
|
||||
{ 0x20, {0x08,0xB0,0xDA,0x9D,0xA7,0xFA,0x93,0x06} }, /* 0x20 FRX-Filter */
|
||||
{ 0x30, {0xBA,0xAC,0x00,0x01,0x85,0x50,0xC0,0x1A} }, /* 0x30 AX-Filter */
|
||||
{ 0x50, {0x96,0x38,0x29,0xF5,0xFA,0x2B,0x8B,0x00} }, /* 0x50 LPX-Filter */
|
||||
{ 0x00, {0x00,0x08,0x08,0x81,0x00,0x80,0x00,0x08} }, /* 0x00 TH-Filter part 1 */
|
||||
{ 0x08, {0x81,0x00,0x80,0x00,0xD7,0x33,0xBA,0x01} }, /* 0x08 TH-Filter part 2 */
|
||||
{ 0x10, {0xB3,0x6C,0xDC,0xA3,0xA4,0xE5,0x88,0x00} } /* 0x10 TH-Filter part 3 */
|
||||
@@ -752,14 +761,14 @@ struct _coeffs ac_coeffs_0dB[11] = {
|
||||
|
||||
struct _coeffs dc_coeffs[9] = {
|
||||
{ 0x80, {0x25,0x59,0x9C,0x23,0x24,0x23,0x32,0x1C} }, /* 0x80 DC-Parameter */
|
||||
{ 0x70, {0x90,0x30,0x1B,0xC0,0x33,0x43,0xAC,0x02} }, /* 0x70 Ringing */
|
||||
{ 0x90, {0x3F,0xC3,0x2E,0x3A,0x80,0x90,0x00,0x09} }, /* 0x90 LP-Filters */
|
||||
{ 0x70, {0x90,0x30,0x1B,0xC0,0x33,0x43,0xAC,0x02} }, /* 0x70 Ringing */
|
||||
{ 0x90, {0x3F,0xC3,0x2E,0x3A,0x80,0x90,0x00,0x09} }, /* 0x90 LP-Filters */
|
||||
{ 0x88, {0xAF,0x80,0x27,0x7B,0x01,0x4C,0x7B,0x02} }, /* 0x88 Hook Levels */
|
||||
{ 0x78, {0x00,0xC0,0x6D,0x7A,0xB3,0x78,0x89,0x00} }, /* 0x78 Ramp Generator */
|
||||
{ 0x58, {0xA5,0x44,0x34,0xDB,0x0E,0xA2,0x2A,0x00} }, /* 0x58 TTX */
|
||||
{ 0x38, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x38 TG1 */
|
||||
{ 0x40, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x40 TG2 */
|
||||
{ 0x98, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} } /* 0x98 Reserved */
|
||||
{ 0x58, {0xA5,0x44,0x34,0xDB,0x0E,0xA2,0x2A,0x00} }, /* 0x58 TTX */
|
||||
{ 0x38, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x38 TG1 */
|
||||
{ 0x40, {0x33,0x49,0x9A,0x65,0xBB,0x00,0x00,0x00} }, /* 0x40 TG2 */
|
||||
{ 0x98, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} } /* 0x98 Reserved */
|
||||
};
|
||||
|
||||
void program_coeffs(int duslic_id, int channel, struct _coeffs *coeffs, int tab_size)
|
||||
@@ -767,7 +776,7 @@ void program_coeffs(int duslic_id, int channel, struct _coeffs *coeffs, int tab_
|
||||
int i;
|
||||
|
||||
for (i = 0; i < tab_size; i++)
|
||||
codsp_write_cop_block(duslic_id, channel, coeffs[i].addr, coeffs[i].values);
|
||||
codsp_write_cop_block(duslic_id, channel, coeffs[i].addr, coeffs[i].values);
|
||||
}
|
||||
|
||||
#define SS_OPEN_CIRCUIT 0
|
||||
@@ -800,7 +809,7 @@ static void codsp_set_slic(int duslic_id, int channel, int state)
|
||||
break;
|
||||
|
||||
case SS_ACTIVE_RING:
|
||||
case SS_ONHOOKTRNSM:
|
||||
case SS_ONHOOKTRNSM:
|
||||
codsp_write_sop_char(duslic_id, channel, BCR1_ADDR, (v & ~BCR1_ACTL) | BCR1_ACTR);
|
||||
codsp_set_ciop_m(duslic_id, channel, CODSP_M_ANY_ACT);
|
||||
break;
|
||||
@@ -864,7 +873,7 @@ int wait_level_metering_finish(int duslic_id, int channel)
|
||||
}
|
||||
|
||||
int measure_on_hook_voltages(int slic_id, long *vdd,
|
||||
long *v_oh_H, long *v_oh_L, long *ring_mean_v, long *ring_rms_v)
|
||||
long *v_oh_H, long *v_oh_L, long *ring_mean_v, long *ring_rms_v)
|
||||
{
|
||||
short LM_Result, Offset_Compensation; /* Signed 16 bit */
|
||||
long int VDD, VDD_diff, V_in, V_out, Divider_Ratio, Vout_diff ;
|
||||
@@ -1029,7 +1038,7 @@ int measure_on_hook_voltages(int slic_id, long *vdd,
|
||||
udelay(10000); /* wait at least 500us to be sure that the Integration Result are valid !!! */
|
||||
|
||||
/* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
|
||||
V_in = (-1) * ( ( (((long int)LM_Result) * V_AD_x10000) / N_SAMPLES) >> (15 - K_INTDC_RECT_OFF)) ; /* Vin x 10000*/
|
||||
|
||||
@@ -1080,7 +1089,7 @@ int measure_on_hook_voltages(int slic_id, long *vdd,
|
||||
udelay(10000);
|
||||
|
||||
/* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
Offset_Compensation = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
|
||||
Offset_Compensation = (-1) * ((Offset_Compensation * (1 << K_INTDC_RECT_ON)) / N_SAMPLES);
|
||||
|
||||
@@ -1107,7 +1116,7 @@ int measure_on_hook_voltages(int slic_id, long *vdd,
|
||||
udelay(10000);
|
||||
|
||||
/* Now Read the LM Result Registers (They will hold their value until LM_EN become zero again */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
/* ==>After that Result Regs will be updated every 500us !!!) */
|
||||
LM_Result = codsp_read_sop_short(duslic_id, channel, LMRES1_ADDR);
|
||||
V_in = (-1) * ( ( (((long int)LM_Result) * V_AD_x10000) / N_SAMPLES) >> (15 - K_INTDC_RECT_ON) ) ; /* Vin x 10000*/
|
||||
|
||||
@@ -1149,22 +1158,22 @@ int test_dtmf(int slic_id)
|
||||
int channel = slic_id & 1;
|
||||
|
||||
for (code = 0; code < 16; code++) {
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
(b & ~(DSCR_PTG | DSCR_DG_KEY(15))) | DSCR_DG_KEY(code) | DSCR_TG1_EN | DSCR_TG2_EN);
|
||||
udelay(80000);
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
(b & ~(DSCR_PTG | DSCR_DG_KEY(15))) | DSCR_DG_KEY(code) | DSCR_TG1_EN | DSCR_TG2_EN);
|
||||
udelay(80000);
|
||||
|
||||
intreg = codsp_read_sop_int(duslic_id, channel, INTREG1_ADDR);
|
||||
if ((intreg & CODSP_INTREG_INT_CH) == 0)
|
||||
if ((intreg & CODSP_INTREG_INT_CH) == 0)
|
||||
break;
|
||||
|
||||
if ((intreg & CODSP_INTREG_DTMF_OK) == 0 ||
|
||||
codsp_dtmf_map[(intreg >> 10) & 15] != codsp_dtmf_map[code])
|
||||
break;
|
||||
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR);
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
|
||||
|
||||
udelay(80000);
|
||||
|
||||
@@ -1172,9 +1181,9 @@ int test_dtmf(int slic_id)
|
||||
}
|
||||
|
||||
if (code != 16) {
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR); /* stop dtmf */
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
|
||||
b = codsp_read_sop_char(duslic_id, channel, DSCR_ADDR); /* stop dtmf */
|
||||
codsp_write_sop_char(duslic_id, channel, DSCR_ADDR,
|
||||
b & ~(DSCR_COR8 | DSCR_TG1_EN | DSCR_TG2_EN));
|
||||
return(1);
|
||||
}
|
||||
|
||||
@@ -1276,7 +1285,7 @@ static int codsp_chip_full_reset(int duslic_id)
|
||||
}
|
||||
|
||||
if (cnt == 5) {
|
||||
printf("PCM_Resync(%u) not completed\n", duslic_id);
|
||||
printf("PCM_Resync(%u) not completed\n", duslic_id);
|
||||
return -2;
|
||||
}
|
||||
|
||||
@@ -1305,11 +1314,11 @@ int slic_self_test(int duslic_mask)
|
||||
for (slic = 0; slic < MAX_SLICS; slic++) { /* voltages self test */
|
||||
if (duslic_mask & (1 << (slic >> 1))) {
|
||||
r = measure_on_hook_voltages(slic, &vdd,
|
||||
&v_oh_H, &v_oh_L, &ring_mean_v, &ring_rms_v);
|
||||
&v_oh_H, &v_oh_L, &ring_mean_v, &ring_rms_v);
|
||||
|
||||
printf("SLIC %u measured voltages (x100):\n\t"
|
||||
"VDD = %ld\tV_OH_H = %ld\tV_OH_L = %ld\tV_RING_MEAN = %ld\tV_RING_RMS = %ld\n",
|
||||
slic, vdd, v_oh_H, v_oh_L, ring_mean_v, ring_rms_v);
|
||||
"VDD = %ld\tV_OH_H = %ld\tV_OH_L = %ld\tV_RING_MEAN = %ld\tV_RING_RMS = %ld\n",
|
||||
slic, vdd, v_oh_H, v_oh_L, ring_mean_v, ring_rms_v);
|
||||
|
||||
if (r != 0)
|
||||
error |= 1 << slic;
|
||||
|
||||
Reference in New Issue
Block a user