85xx: Added various P1012/P1013/P1021/P1022 defines

There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list
* Added number of LAWs for P1012/P1013/P1021/P1022
* Set CONFIG_MAX_CPUS to 2 for P1021/P1022
* PCI port config

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2010-03-30 23:06:53 -05:00
parent 5a85a30969
commit 216082754f
6 changed files with 53 additions and 6 deletions

View File

@@ -1,5 +1,5 @@
/*
* Copyright 2009 Freescale Semiconductor, Inc.
* Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -41,6 +41,7 @@
#endif
#if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
defined(CONFIG_P1021) || defined(CONFIG_P1022) || \
defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
#define CONFIG_MAX_CPUS 2
#elif defined(CONFIG_PPC_P4080)

View File

@@ -1035,8 +1035,16 @@
#define SVR_8572_E 0x80E800
#define SVR_P1011 0x80E500
#define SVR_P1011_E 0x80ED00
#define SVR_P1012 0x80E501
#define SVR_P1012_E 0x80ED01
#define SVR_P1013 0x80E700
#define SVR_P1013_E 0x80EF00
#define SVR_P1020 0x80E400
#define SVR_P1020_E 0x80EC00
#define SVR_P1021 0x80E401
#define SVR_P1021_E 0x80EC01
#define SVR_P1022 0x80E600
#define SVR_P1022_E 0x80EE00
#define SVR_P2010 0x80E300
#define SVR_P2010_E 0x80EB00
#define SVR_P2020 0x80E200