ppc4xx: Fix problem in PLL clock calculation
This patch was originall provided by David Mitchell <dmitchell@amcc.com> and fixes a bug in the PLL clock calculation. Signed-off-by: Stefan Roese <sr@denx.de>
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@@ -617,6 +617,8 @@
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#define CPR_CLKUPD_ENDVCH_EN 0x20000000 /* Enable CPR Sys. Div. Changes */
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#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
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#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */
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#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
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#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
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#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */
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