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arm64: Add MIDR entries for Cortex-A57 and Cortex-A76

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Add MIDR entries for Cortex-A57 and Cortex-A76 cores.
Those are used on R-Car Gen3 and Gen4 SoCs respectively.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This commit is contained in:
Marek Vasut
2025-01-01 20:19:05 +01:00
parent ddb0f26dc4
commit 2fca3cf799
1 changed files with 4 additions and 0 deletions
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4
arch/arm/include/asm/armv8/cpu.h
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@@ -5,7 +5,9 @@
#define MIDR_PARTNUM_CORTEX_A35 0xD04
#define MIDR_PARTNUM_CORTEX_A53 0xD03
#define MIDR_PARTNUM_CORTEX_A57 0xD07
#define MIDR_PARTNUM_CORTEX_A72 0xD08
#define MIDR_PARTNUM_CORTEX_A76 0xD0B
#define MIDR_PARTNUM_SHIFT 0x4
#define MIDR_PARTNUM_MASK (0xFFF << MIDR_PARTNUM_SHIFT)
@@ -29,4 +31,6 @@ static inline unsigned int read_midr(void)
is_cortex_a(35)
is_cortex_a(53)
is_cortex_a(57)
is_cortex_a(72)
is_cortex_a(76)