Merge branch 'cherry-a8f09d62821' into 'master'

[pickman] Merge tag 'u-boot-stm32-20241218' of https://source.denx.de/u-boot/custodians/u-boot-stm

See merge request u-boot/u-boot!255
This commit is contained in:
Simon Glass
2025-12-19 01:06:34 +00:00
13 changed files with 34 additions and 4 deletions

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@@ -690,6 +690,7 @@ config STACK_SIZE
hex "Define max stack size that can be used by U-Boot"
default 0x4000000 if ARCH_VERSAL_NET || ARCH_VERSAL || ARCH_ZYNQMP
default 0x200000 if MICROBLAZE
default 0x4000 if ARCH_STM32
default 0x1000000
help
Define Max stack size that can be used by U-Boot. This value is used

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@@ -186,6 +186,9 @@
bootph-all;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "hse", "hsi", "csi", "lse", "lsi";
clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
<&clk_lse>, <&clk_lsi>;
};
&usart1 {

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@@ -112,6 +112,10 @@
};
&rcc {
clock-names = "hse", "hsi", "csi", "lse", "lsi";
clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
<&clk_lse>, <&clk_lsi>;
st,clksrc = <
CLK_MPU_PLL1P
CLK_AXI_PLL2P

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@@ -53,6 +53,7 @@ void dram_bank_mmu_setup(int bank)
struct bd_info *bd = gd->bd;
int i;
phys_addr_t start;
phys_addr_t addr;
phys_size_t size;
bool use_lmb = false;
enum dcache_option option;
@@ -77,8 +78,12 @@ void dram_bank_mmu_setup(int bank)
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
addr = i << MMU_SECTION_SHIFT;
option = DCACHE_DEFAULT_OPTION;
if (use_lmb && lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP))
if (use_lmb &&
(lmb_is_reserved_flags(i << MMU_SECTION_SHIFT, LMB_NOMAP) ||
addr >= gd->ram_top)
)
option = 0; /* INVALID ENTRY in TLB */
set_section_dcache(i, option);
}

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@@ -64,7 +64,7 @@ obj-$(CONFIG_$(PHASE_)EXPO_DUMP) += expo_dump.o
obj-$(CONFIG_$(PHASE_)EXPO) += scene_menu.o scene_textline.o scene_textedit.o
obj-$(CONFIG_$(PHASE_)EXPO_TEST) += expo_test.o
ifdef CONFIG_COREBOOT_SYSINFO
obj-$(CONFIG_$(SPL_TPL_)EXPO) += expo_build_cb.o
obj-$(CONFIG_$(PHASE_)EXPO) += expo_build_cb.o
endif
obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE) += vbe.o

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@@ -28,6 +28,9 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y

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@@ -28,6 +28,9 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y

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@@ -28,6 +28,9 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y

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@@ -28,6 +28,9 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y

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@@ -39,6 +39,9 @@ CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_I2C=y
CONFIG_SPL_MTD=y

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@@ -7,5 +7,4 @@ CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_SYS_I2C_EEPROM_BUS=3
CONFIG_OF_LIST="st/stm32mp157c-dhcom-pdk2 st/stm32mp153c-dhcom-drc02 st/stm32mp157c-dhcom-picoitx"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
CONFIG_SYS_I2C_EEPROM_ADDR=0x50

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@@ -5,7 +5,6 @@ CONFIG_ARCH_STM32MP=y
CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp157a-dhcor-avenger96"
CONFIG_SYS_I2C_EEPROM_BUS=2
CONFIG_OF_LIST="st/stm32mp157a-dhcor-avenger96 st/stm32mp151a-dhcor-testbench st/stm32mp153c-dhcor-drc-compact"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
CONFIG_SYS_I2C_EEPROM_ADDR=0x53
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y

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@@ -22,6 +22,7 @@ CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_HWSPINLOCK_STM32=y
CONFIG_KS8851_MLL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks access-controllers"
CONFIG_PHY_ANEG_TIMEOUT=20000
CONFIG_PINCTRL_STMFX=y
CONFIG_REMOTEPROC_STM32_COPRO=y
@@ -58,11 +59,14 @@ CONFIG_SPL_HAVE_INIT_STACK=y
CONFIG_SPL_STACK=0x30000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
CONFIG_SPL_TEXT_BASE=0x2FFC2500
CONFIG_SPL_USB_GADGET=y
CONFIG_STM32_ADC=y
CONFIG_SYSRESET_SYSCON=y
CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MALLOC_F_LEN=0x3000
CONFIG_SYS_PBSIZE=1050
CONFIG_PREBOOT="run dh_preboot"