arm64: dts: rockchip: Add clock generators for RK3528 SoC
Add dt node for RK3528 clock and reset unit. Clock "gmac0_clk" is generated by internal Ethernet phy, a fixed clock node is added as a placeholder to avoid orphans. Signed-off-by: Yao Zi <ziyao@disroot.org> Link: https://lore.kernel.org/r/20250217061142.38480-9-ziyao@disroot.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: 858cdcdd11cf9913756297d3869e4de0f01329ea ] (cherry picked from commit 60741472b42e92d2393327cb70669ab90e3b382f) Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@@ -6,6 +6,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/rockchip,rk3528-cru.h>
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/ {
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compatible = "rockchip,rk3528";
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@@ -95,6 +96,13 @@
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#clock-cells = <0>;
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};
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gmac0_clk: clock-gmac50m {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "gmac0";
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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ranges = <0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000>;
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@@ -114,6 +122,49 @@
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#interrupt-cells = <3>;
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};
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cru: clock-controller@ff4a0000 {
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compatible = "rockchip,rk3528-cru";
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reg = <0x0 0xff4a0000 0x0 0x30000>;
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assigned-clocks =
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<&cru XIN_OSC0_DIV>, <&cru PLL_GPLL>,
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<&cru PLL_PPLL>, <&cru PLL_CPLL>,
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<&cru ARMCLK>, <&cru CLK_MATRIX_250M_SRC>,
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<&cru CLK_MATRIX_500M_SRC>,
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<&cru CLK_MATRIX_50M_SRC>,
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<&cru CLK_MATRIX_100M_SRC>,
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<&cru CLK_MATRIX_150M_SRC>,
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<&cru CLK_MATRIX_200M_SRC>,
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<&cru CLK_MATRIX_300M_SRC>,
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<&cru CLK_MATRIX_339M_SRC>,
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<&cru CLK_MATRIX_400M_SRC>,
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<&cru CLK_MATRIX_600M_SRC>,
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<&cru CLK_PPLL_50M_MATRIX>,
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<&cru CLK_PPLL_100M_MATRIX>,
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<&cru CLK_PPLL_125M_MATRIX>,
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<&cru ACLK_BUS_VOPGL_ROOT>;
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assigned-clock-rates =
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<32768>, <1188000000>,
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<1000000000>, <996000000>,
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<408000000>, <250000000>,
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<500000000>,
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<50000000>,
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<100000000>,
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<150000000>,
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<200000000>,
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<300000000>,
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<340000000>,
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<400000000>,
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<600000000>,
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<50000000>,
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<100000000>,
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<125000000>,
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<500000000>;
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clocks = <&xin24m>, <&gmac0_clk>;
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clock-names = "xin24m", "gmac0";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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uart0: serial@ff9f0000 {
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compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart";
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reg = <0x0 0xff9f0000 0x0 0x100>;
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