rockchip: rk3288-tinker: Fix slow Ethernet initializion

For some reason the Ethernet PHY reset delay is set to 1 second, this
cause an unneccecery long boot delay.

Tinker Board use RTL8211E or RTL8211F Ethernet PHY, datasheet list an
initial 10ms delay and then a 30-76ms delay before accessing registers.

Change to use 80ms delay instead of a full second to speed up Ethernet
initializion in U-Boot.

Also enable PHY_REALTEK, DM_ETH_PHY and PHY_GIGE to improve Ethernet PHY
support in U-Boot.

Before:

  1,404,971    960,924  eth_common_init
  2,438,830  1,033,859  eth_initialize
  2,444,449      5,619  main_loop
  2,445,153        704  cli_loop

After:

  1,404,987    960,710  eth_common_init
  1,519,110    114,123  eth_initialize
  1,524,734      5,624  main_loop
  1,525,452        718  cli_loop

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman
2024-11-05 16:00:35 +00:00
committed by Tom Rini
parent a0a880942b
commit 57237c7f41
3 changed files with 10 additions and 0 deletions

View File

@@ -16,6 +16,10 @@
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};
&gmac {
snps,reset-delays-us = <0 10000 80000>;
};
&gpio7 {
/delete-property/ bootph-all;
};

View File

@@ -58,6 +58,9 @@ CONFIG_ROCKCHIP_EFUSE=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y

View File

@@ -58,6 +58,9 @@ CONFIG_ROCKCHIP_EFUSE=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y