Fix coding style issues; update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
2007-12-27 01:52:50 +01:00
parent 6e1bbe6e3e
commit 61fb15c516
32 changed files with 916 additions and 196 deletions

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@@ -1,7 +1,7 @@
#
# Copyright (C) 2007
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
#
#
# Copyright (C) 2007
# Kenati Technologies, Inc.
#

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@@ -29,4 +29,3 @@
#
TEXT_BASE = 0x8FFC0000

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@@ -1,7 +1,7 @@
/*
* Copyright (C) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
*
* Copyright (C) 2007
* Kenati Technologies, Inc.
*
@@ -52,19 +52,19 @@ lowlevel_init:
mov.l r0, @r1
mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
mov.l MSTPCR0_D, r0 !
mov.l MSTPCR0_D, r0 !
mov.l r0, @r1
mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
mov.l MSTPCR2_D, r0 !
mov.l MSTPCR2_D, r0 !
mov.l r0, @r1
mov.l SBSCR_A, r1 !
mov.w SBSCR_D, r0 !
mov.l SBSCR_A, r1 !
mov.w SBSCR_D, r0 !
mov.w r0, @r1
mov.l PSCR_A, r1 !
mov.w PSCR_D, r0 !
mov.l PSCR_A, r1 !
mov.w PSCR_D, r0 !
mov.w r0, @r1
! mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
@@ -80,7 +80,7 @@ lowlevel_init:
mov.w r0, @r1
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
mov.l FRQCR_D, r0 !
mov.l FRQCR_D, r0 !
mov.l r0, @r1
mov.l CCR_A, r1 ! Address of Cache Control Register
@@ -200,11 +200,9 @@ bsc_init:
rts
mov #0, r0
.align 2
CCR_A: .long CCR
CCR_A: .long CCR
MMUCR_A: .long MMUCR
MSTPCR0_A: .long MSTPCR0
MSTPCR2_A: .long MSTPCR2
@@ -223,7 +221,7 @@ FRQCR_D: .long 0x07022538
PSELA_A: .long 0xa405014E
PSELA_D: .word 0x0A10
.align 2
.align 2
DRVCR_A: .long 0xa405018A
DRVCR_D: .word 0x0554

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@@ -4,7 +4,7 @@
*
* Copyright (C) 2007
* Kenati Technologies, Inc.
*
*
* board/ms7722se/ms7722se.c
*
* This program is free software; you can redistribute it and/or
@@ -57,4 +57,3 @@ void led_set_state (unsigned short value)
{
*((volatile unsigned short *) LED_BASE) = (value & 0xFF);
}

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@@ -32,19 +32,19 @@ SECTIONS
Although size of SDRAM can be either 16 or 32 MBytes,
we assume 16 MBytes (ie ignore upper half if the full
32 MBytes is present).
NOTE: This address must match with the definition of
TEXT_BASE in config.mk (in this directory).
*/
. = 0x8C000000 + (64*1024*1024) - (256*1024);
PROVIDE (reloc_dst = .);
PROVIDE (_ftext = .);
PROVIDE (_fcode = .);
PROVIDE (_start = .);
.text :
{
cpu/sh4/start.o (.text)
@@ -89,7 +89,7 @@ SECTIONS
}
PROVIDE (__u_boot_cmd_end = .);
PROVIDE (reloc_dst_end = .);
PROVIDE (reloc_dst_end = .);
/* _reloc_dst_end = .; */
PROVIDE (bss_start = .);
@@ -103,4 +103,3 @@ SECTIONS
PROVIDE (_end = .);
}