cache: add sifive private L2 cache driver

This driver is currently responsible for enabling the clock gating
feature of SiFive pre core's private L2 cache.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Zong Li
2023-12-14 14:09:36 +00:00
committed by Leo Yu-Chi Liang
parent 4b151562bb
commit 64e8482f1c
3 changed files with 52 additions and 0 deletions

View File

@@ -45,4 +45,11 @@ config SIFIVE_CCACHE
This driver is for SiFive Composable L2/L3 cache. It enables cache
ways of composable cache.
config SIFIVE_PL2
bool "SiFive private L2 cache"
select CACHE
help
This driver is for SiFive Private L2 cache. It configures registers
to enable the clock gating feature.
endmenu