ARM: tegra: Tegra20 pinmux cleanup
This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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Tom Warren
parent
dfb42fc95d
commit
70ad375ee4
@@ -229,8 +229,8 @@ static int handle_stage(const void *blob)
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break;
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case STAGE_PWM:
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/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
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pinmux_set_func(PINGRP_GPU, PMUX_FUNC_PWM);
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pinmux_tristate_disable(PINGRP_GPU);
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pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
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pinmux_tristate_disable(PMUX_PINGRP_GPU);
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pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
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break;
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