drivers/mc: Migrated MC Flibs to 0.5.2
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
J. German Rivera
committed by
York Sun
York Sun
parent
4f2532c4a4
commit
7b3bd9a798
121
include/fsl-mc/fsl_dpmng.h
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121
include/fsl-mc/fsl_dpmng.h
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/* Copyright 2014 Freescale Semiconductor Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*!
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* @file fsl_dpmng.h
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* @brief Management Complex General API
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*/
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#ifndef __FSL_DPMNG_H
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#define __FSL_DPMNG_H
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/*!
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* @Group grp_dpmng Management Complex General API
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*
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* @brief Contains general API for the Management Complex firmware
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* @{
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*/
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struct fsl_mc_io;
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/**
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* @brief Management Complex firmware version information
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*/
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#define MC_VER_MAJOR 4
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#define MC_VER_MINOR 0
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struct mc_version {
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uint32_t major;
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/*!< Major version number: incremented on API compatibility changes */
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uint32_t minor;
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/*!< Minor version number: incremented on API additions (that are
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* backward compatible); reset when major version is incremented
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*/
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uint32_t revision;
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/*!< Internal revision number: incremented on implementation changes
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* and/or bug fixes that have no impact on API
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*/
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};
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/**
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* @brief Retrieves the Management Complex firmware version information
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*
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* @param[in] mc_io Pointer to opaque I/O object
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* @param[out] mc_ver_info Pointer to version information structure
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*
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* @returns '0' on Success; Error code otherwise.
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*/
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int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info);
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/**
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* @brief Resets an AIOP tile
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*
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* @param[in] mc_io Pointer to opaque I/O object
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* @param[in] container_id AIOP container ID
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* @param[in] aiop_tile_id AIOP tile ID to reset
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*
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* @returns '0' on Success; Error code otherwise.
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*/
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int dpmng_reset_aiop(struct fsl_mc_io *mc_io,
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int container_id,
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int aiop_tile_id);
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/**
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* @brief Loads an image to AIOP tile
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*
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* @param[in] mc_io Pointer to opaque I/O object
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* @param[in] container_id AIOP container ID
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* @param[in] aiop_tile_id AIOP tile ID to reset
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* @param[in] img_iova I/O virtual address of AIOP ELF image
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* @param[in] img_size Size of AIOP ELF image in memory (in bytes)
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*
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* @returns '0' on Success; Error code otherwise.
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*/
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int dpmng_load_aiop(struct fsl_mc_io *mc_io,
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int container_id,
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int aiop_tile_id,
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uint64_t img_iova,
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uint32_t img_size);
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/**
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* @brief AIOP run configuration
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*/
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struct dpmng_aiop_run_cfg {
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uint32_t cores_mask;
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/*!< Mask of AIOP cores to run (core 0 in most significant bit) */
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uint64_t options;
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/*!< Execution options (currently none defined) */
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};
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/**
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* @brief Starts AIOP tile execution
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*
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* @param[in] mc_io Pointer to MC portal's I/O object
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* @param[in] container_id AIOP container ID
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* @param[in] aiop_tile_id AIOP tile ID to reset
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* @param[in] cfg AIOP run configuration
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*
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* @returns '0' on Success; Error code otherwise.
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*/
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int dpmng_run_aiop(struct fsl_mc_io *mc_io,
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int container_id,
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int aiop_tile_id,
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const struct dpmng_aiop_run_cfg *cfg);
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/**
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* @brief Resets MC portal
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*
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* This function closes all object handles (tokens) that are currently
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* open in the MC portal on which the command is submitted. This allows
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* cleanup of stale handles that belong to non-functional user processes.
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*
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* @param[in] mc_io Pointer to MC portal's I/O object
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*
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* @returns '0' on Success; Error code otherwise.
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*/
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int dpmng_reset_mc_portal(struct fsl_mc_io *mc_io);
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/** @} */
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#endif /* __FSL_DPMNG_H */
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59
include/fsl-mc/fsl_mc.h
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59
include/fsl-mc/fsl_mc.h
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/*
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* Copyright (C) 2014 Freescale Semiconductor
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_MC_H__
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#define __FSL_MC_H__
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#include <common.h>
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#define MC_CCSR_BASE_ADDR \
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((struct mc_ccsr_registers __iomem *)0x8340000)
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#define BIT(x) (1 << (x))
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#define GCR1_P1_STOP BIT(31)
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#define GCR1_P2_STOP BIT(30)
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#define GCR1_P1_DE_RST BIT(23)
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#define GCR1_P2_DE_RST BIT(22)
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#define GCR1_M1_DE_RST BIT(15)
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#define GCR1_M2_DE_RST BIT(14)
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#define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST)
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#define GSR_FS_MASK 0x3fffffff
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#define MCFAPR_PL_MASK (0x1 << 18)
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#define MCFAPR_BMT_MASK (0x1 << 17)
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#define MCFAPR_BYPASS_ICID_MASK \
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(MCFAPR_PL_MASK | MCFAPR_BMT_MASK)
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#define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000)
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#define SOC_MC_PORTAL_STRIDE 0x10000
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#define SOC_MC_PORTAL_ADDR(_portal_id) \
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((void __iomem *)((uintptr_t)SOC_MC_PORTALS_BASE_ADDR + \
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(_portal_id) * SOC_MC_PORTAL_STRIDE))
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struct mc_ccsr_registers {
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u32 reg_gcr1;
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u32 reserved1;
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u32 reg_gsr;
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u32 reserved2;
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u32 reg_sicbalr;
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u32 reg_sicbahr;
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u32 reg_sicapr;
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u32 reserved3;
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u32 reg_mcfbalr;
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u32 reg_mcfbahr;
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u32 reg_mcfapr;
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u32 reserved4[0x2f1];
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u32 reg_psr;
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u32 reserved5;
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u32 reg_brr[2];
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u32 reserved6[0x80];
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u32 reg_error[];
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};
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int mc_init(bd_t *bis);
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int get_mc_boot_status(void);
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#endif
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132
include/fsl-mc/fsl_mc_cmd.h
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132
include/fsl-mc/fsl_mc_cmd.h
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/* Copyright 2014 Freescale Semiconductor Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_MC_CMD_H
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#define __FSL_MC_CMD_H
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#define MC_CMD_NUM_OF_PARAMS 7
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#define MAKE_UMASK64(_width) \
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((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
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static inline uint64_t u64_enc(int lsoffset, int width, uint64_t val)
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{
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return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
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}
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static inline uint64_t u64_dec(uint64_t val, int lsoffset, int width)
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{
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return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
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}
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struct mc_command {
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uint64_t header;
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uint64_t params[MC_CMD_NUM_OF_PARAMS];
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};
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enum mc_cmd_status {
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MC_CMD_STATUS_OK = 0x0, /*!< Completed successfully */
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MC_CMD_STATUS_READY = 0x1, /*!< Ready to be processed */
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MC_CMD_STATUS_AUTH_ERR = 0x3, /*!< Authentication error */
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MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /*!< No privilege */
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MC_CMD_STATUS_DMA_ERR = 0x5, /*!< DMA or I/O error */
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MC_CMD_STATUS_CONFIG_ERR = 0x6, /*!< Configuration error */
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MC_CMD_STATUS_TIMEOUT = 0x7, /*!< Operation timed out */
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MC_CMD_STATUS_NO_RESOURCE = 0x8, /*!< No resources */
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MC_CMD_STATUS_NO_MEMORY = 0x9, /*!< No memory available */
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MC_CMD_STATUS_BUSY = 0xA, /*!< Device is busy */
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MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /*!< Unsupported operation */
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MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */
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};
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#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */
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#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */
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#define MC_CMD_HDR_AUTHID_O 38 /* Authentication ID field offset */
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#define MC_CMD_HDR_AUTHID_S 10 /* Authentication ID field size */
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#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */
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#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/
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#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */
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#define MC_CMD_HDR_PRI_S 1 /* Priority field size */
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#define MC_CMD_HDR_READ_STATUS(_hdr) \
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((enum mc_cmd_status)u64_dec((_hdr), \
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MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
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#define MC_CMD_HDR_READ_AUTHID(_hdr) \
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((uint16_t)u64_dec((_hdr), MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S))
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#define MC_CMD_PRI_LOW 0 /*!< Low Priority command indication */
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#define MC_CMD_PRI_HIGH 1 /*!< High Priority command indication */
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#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
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((_cmd).params[_param] |= u64_enc((_offset), (_width), _arg))
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#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
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(_arg = (_type)u64_dec(_cmd.params[_param], (_offset), (_width)))
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static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
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uint8_t priority,
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uint16_t auth_id)
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{
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uint64_t hdr;
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hdr = u64_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
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hdr |= u64_enc(MC_CMD_HDR_AUTHID_O, MC_CMD_HDR_AUTHID_S, auth_id);
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hdr |= u64_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority);
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hdr |= u64_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
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MC_CMD_STATUS_READY);
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return hdr;
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}
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/**
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* mc_write_command - writes a command to a Management Complex (MC) portal
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*
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* @portal: pointer to an MC portal
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* @cmd: pointer to a filled command
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*/
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static inline void mc_write_command(struct mc_command __iomem *portal,
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struct mc_command *cmd)
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{
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int i;
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/* copy command parameters into the portal */
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for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
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writeq(cmd->params[i], &portal->params[i]);
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/* submit the command by writing the header */
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writeq(cmd->header, &portal->header);
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}
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/**
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* mc_read_response - reads the response for the last MC command from a
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* Management Complex (MC) portal
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*
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* @portal: pointer to an MC portal
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* @resp: pointer to command response buffer
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*
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* Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
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*/
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static inline enum mc_cmd_status mc_read_response(
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struct mc_command __iomem *portal,
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struct mc_command *resp)
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{
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int i;
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enum mc_cmd_status status;
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/* Copy command response header from MC portal: */
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resp->header = readq(&portal->header);
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status = MC_CMD_HDR_READ_STATUS(resp->header);
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if (status != MC_CMD_STATUS_OK)
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return status;
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/* Copy command response data from MC portal: */
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for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
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resp->params[i] = readq(&portal->params[i]);
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return status;
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}
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int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
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#endif /* __FSL_MC_CMD_H */
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26
include/fsl-mc/fsl_mc_sys.h
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26
include/fsl-mc/fsl_mc_sys.h
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@@ -0,0 +1,26 @@
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/*
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* Freescale Layerscape Management Complex (MC) Environment-specific code
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*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _FSL_MC_SYS_H
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#define _FSL_MC_SYS_H
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#include <asm/io.h>
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struct mc_command;
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/*
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* struct mc_portal_wrapper - MC command portal wrapper object
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*/
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struct fsl_mc_io {
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struct mc_command __iomem *mmio_regs;
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};
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int mc_send_command(struct fsl_mc_io *mc_io,
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struct mc_command *cmd);
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#endif /* _FSL_MC_SYS_H */
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