drivers/cpu: Add generic armv8 cpu driver
Add a generic driver that binds to armv8 CPU nodes. The generic driver allows
- to enumerate CPUs present in a system, even when no other driver binds it
- generates ACPI SSDT code for each CPU
- Fill the ACPI MADT table (implemented in a follow up patch)
The newly introduced code could also be reused on other CPU drivers that are
compatible with armv8.
TEST: Booted on QEMU sbsa and verify the driver binds to CPU nodes.
Confirmed with FWTS that all ACPI processor devices are present.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
This commit is contained in:
committed by
Tom Rini
parent
1289c7ccba
commit
83a2f4a8d2
@@ -26,6 +26,12 @@ config CPU_RISCV
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help
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Support CPU cores for RISC-V architecture.
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config CPU_ARMV8
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bool "Enable generic ARMv8 CPU driver"
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depends on CPU && ARM64
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help
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Support CPU cores for armv8 architecture.
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config CPU_MICROBLAZE
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bool "Enable Microblaze CPU driver"
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depends on CPU && MICROBLAZE
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@@ -6,10 +6,12 @@
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obj-$(CONFIG_CPU) += cpu-uclass.o
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obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o
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obj-$(CONFIG_ARCH_IMX8) += imx8_cpu.o
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obj-$(CONFIG_ARCH_AT91) += at91_cpu.o
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obj-$(CONFIG_ARCH_MEDIATEK) += mtk_cpu.o
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obj-$(CONFIG_CPU_ARMV8) += armv8_cpu.o
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obj-$(CONFIG_CPU_IMX) += imx8_cpu.o
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obj-$(CONFIG_CPU_MPC83XX) += mpc83xx_cpu.o
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obj-$(CONFIG_CPU_RISCV) += riscv_cpu.o
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73
drivers/cpu/armv8_cpu.c
Normal file
73
drivers/cpu/armv8_cpu.c
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@@ -0,0 +1,73 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 9elements GmbH
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*/
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#include <cpu.h>
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#include <dm.h>
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#include <acpi/acpigen.h>
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#include <asm/armv8/cpu.h>
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#include <dm/acpi.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#include <linux/printk.h>
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#include <linux/sizes.h>
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static int armv8_cpu_get_desc(const struct udevice *dev, char *buf, int size)
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{
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int cpuid;
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cpuid = (read_midr() & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT;
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snprintf(buf, size, "CPU MIDR %04x", cpuid);
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return 0;
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}
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static int armv8_cpu_get_info(const struct udevice *dev,
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struct cpu_info *info)
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{
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info->cpu_freq = 0;
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info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
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return 0;
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}
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static int armv8_cpu_get_count(const struct udevice *dev)
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{
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return uclass_id_count(UCLASS_CPU);
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}
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#ifdef CONFIG_ACPIGEN
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int armv8_cpu_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
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{
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uint core_id = dev_seq(dev);
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acpigen_write_processor_device(ctx, core_id);
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return 0;
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}
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struct acpi_ops armv8_cpu_acpi_ops = {
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.fill_ssdt = armv8_cpu_fill_ssdt,
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};
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#endif
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static const struct cpu_ops cpu_ops = {
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.get_count = armv8_cpu_get_count,
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.get_desc = armv8_cpu_get_desc,
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.get_info = armv8_cpu_get_info,
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};
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static const struct udevice_id cpu_ids[] = {
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{ .compatible = "arm,armv8" },
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{}
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};
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U_BOOT_DRIVER(arm_cpu) = {
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.name = "arm-cpu",
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.id = UCLASS_CPU,
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.of_match = cpu_ids,
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.ops = &cpu_ops,
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.flags = DM_FLAG_PRE_RELOC,
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ACPI_OPS_PTR(&armv8_cpu_acpi_ops)
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};
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21
drivers/cpu/armv8_cpu.h
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21
drivers/cpu/armv8_cpu.h
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@@ -0,0 +1,21 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 9elements GmbH
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*/
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#include <dm/acpi.h>
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#include <dm/device.h>
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#ifndef _ARMV8_CPU_H_
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#define _ARMV8_CPU_H_
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/**
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* armv8_cpu_fill_ssdt() - Fill the SSDT
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* Parses the FDT and writes the SSDT nodes.
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*
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* @dev: cpu device to generate ACPI tables for
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* @ctx: ACPI context pointer
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* @return: 0 if OK, or a negative error code.
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*/
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int armv8_cpu_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx);
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#endif
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