net/designware - switch driver to phylib usage

With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
 * Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
 * Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
 * Support of custom phy initialization is now done with existing
"board_phy_config".

Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.

For example:
 * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
 * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used

I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This commit is contained in:
Alexey Brodkin
2014-01-22 20:54:06 +04:00
committed by Tom Rini
parent 27ee59af28
commit 92a190aaab
13 changed files with 183 additions and 385 deletions

View File

@@ -16,8 +16,6 @@
#define CONFIG_MACRESET_TIMEOUT (3 * CONFIG_SYS_HZ)
#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)
#define CONFIG_PHYRESET_TIMEOUT (3 * CONFIG_SYS_HZ)
#define CONFIG_AUTONEG_TIMEOUT (5 * CONFIG_SYS_HZ)
struct eth_mac_regs {
u32 conf; /* 0x00 */
@@ -217,14 +215,9 @@ struct dmamacdescr {
#endif
struct dw_eth_dev {
u32 address;
u32 interface;
u32 speed;
u32 duplex;
u32 tx_currdescnum;
u32 rx_currdescnum;
u32 phy_configured;
u32 link_printed;
struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
@@ -236,15 +229,8 @@ struct dw_eth_dev {
struct eth_dma_regs *dma_regs_p;
struct eth_device *dev;
struct phy_device *phydev;
struct mii_dev *bus;
};
/* Speed specific definitions */
#define SPEED_10M 1
#define SPEED_100M 2
#define SPEED_1000M 3
/* Duplex mode specific definitions */
#define HALF_DUPLEX 1
#define FULL_DUPLEX 2
#endif