Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Fix some spelling mistakes
This commit is contained in:
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7790 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7790 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7791 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7791 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7792 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7792 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7793 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7793 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7794 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7794 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7795 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7795 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
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||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A7796 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A7796 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
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||||
|
||||
@@ -1,6 +1,6 @@
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||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A77965 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A77965 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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||||
*/
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||||
|
||||
@@ -1,6 +1,6 @@
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||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A77970 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A77970 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
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||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A77980 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A77980 SoC
|
||||
*
|
||||
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A77990 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A77990 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar R8A77995 SoC
|
||||
* Device Tree Source extras for U-Boot on R-Car R8A77995 SoC
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on RCar Gen3
|
||||
* Device Tree Source extras for U-Boot on R-Car Gen3
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,11 +1,11 @@
|
||||
if RCAR_32
|
||||
|
||||
config ARCH_RENESAS_BOARD_STRING
|
||||
string "Renesas RCar Gen2 board name"
|
||||
string "Renesas R-Car Gen2 board name"
|
||||
default "Board"
|
||||
|
||||
config RCAR_GEN2
|
||||
bool "Renesas RCar Gen2"
|
||||
bool "Renesas R-Car Gen2"
|
||||
select PHY
|
||||
select PHY_RCAR_GEN2
|
||||
select TMU_TIMER
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Specialty padding for the RCar Gen2 SPL JTAG loading
|
||||
* Specialty padding for the R-Car Gen2 SPL JTAG loading
|
||||
*/
|
||||
|
||||
#ifndef __BOOT0_H
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen3 memory map tables
|
||||
* Renesas R-Car Gen3 memory map tables
|
||||
*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -5,20 +5,20 @@ config CLK_RENESAS
|
||||
Enable support for clock present on Renesas SoCs.
|
||||
|
||||
config CLK_RCAR
|
||||
bool "Renesas RCar clock driver support"
|
||||
bool "Renesas R-Car clock driver support"
|
||||
help
|
||||
Enable common code for clocks on Renesas RCar SoCs.
|
||||
Enable common code for clocks on Renesas R-Car SoCs.
|
||||
|
||||
config CLK_RCAR_CPG_LIB
|
||||
bool "CPG/MSSR library functions"
|
||||
|
||||
config CLK_RCAR_GEN2
|
||||
bool "Renesas RCar Gen2 clock driver"
|
||||
bool "Renesas R-Car Gen2 clock driver"
|
||||
def_bool y if RCAR_32
|
||||
depends on CLK_RENESAS
|
||||
select CLK_RCAR
|
||||
help
|
||||
Enable this to support the clocks on Renesas RCar Gen2 SoC.
|
||||
Enable this to support the clocks on Renesas R-Car Gen2 SoC.
|
||||
|
||||
config CLK_R8A7790
|
||||
bool "Renesas R8A7790 clock driver"
|
||||
@@ -51,14 +51,14 @@ config CLK_R8A7794
|
||||
Enable this to support the clocks on Renesas R8A7794 SoC.
|
||||
|
||||
config CLK_RCAR_GEN3
|
||||
bool "Renesas RCar Gen3 and Gen4 clock driver"
|
||||
bool "Renesas R-Car Gen3 and Gen4 clock driver"
|
||||
def_bool y if RCAR_64
|
||||
depends on CLK_RENESAS
|
||||
select CLK_RCAR
|
||||
select CLK_RCAR_CPG_LIB
|
||||
select DM_RESET
|
||||
help
|
||||
Enable this to support the clocks on Renesas RCar Gen3 and Gen4 SoCs.
|
||||
Enable this to support the clocks on Renesas R-Car Gen3 and Gen4 SoCs.
|
||||
|
||||
config CLK_R8A774A1
|
||||
bool "Renesas R8A774A1 clock driver"
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen2 CPG MSSR driver
|
||||
* Renesas R-Car Gen2 CPG MSSR driver
|
||||
*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen3 CPG MSSR driver
|
||||
* Renesas R-Car Gen3 CPG MSSR driver
|
||||
*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen3 CPG MSSR driver
|
||||
* Renesas R-Car Gen3 CPG MSSR driver
|
||||
*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen3 CPG MSSR driver
|
||||
* Renesas R-Car Gen3 CPG MSSR driver
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Renesas RCar Gen3 CPG MSSR driver
|
||||
* Renesas R-Car Gen3 CPG MSSR driver
|
||||
*
|
||||
* Copyright (C) 2017-2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -358,10 +358,10 @@ config PCF8575_GPIO
|
||||
chips are from NXP and TI.
|
||||
|
||||
config RCAR_GPIO
|
||||
bool "Renesas RCar GPIO driver"
|
||||
bool "Renesas R-Car GPIO driver"
|
||||
depends on DM_GPIO && ARCH_RENESAS
|
||||
help
|
||||
This driver supports the GPIO banks on Renesas RCar SoCs.
|
||||
This driver supports the GPIO banks on Renesas R-Car SoCs.
|
||||
|
||||
config RZA1_GPIO
|
||||
bool "Renesas RZ/A1 GPIO driver"
|
||||
|
||||
@@ -504,16 +504,16 @@ config SYS_I2C_OMAP24XX
|
||||
Add support for the OMAP2+ I2C driver.
|
||||
|
||||
config SYS_I2C_RCAR_I2C
|
||||
bool "Renesas RCar I2C driver"
|
||||
bool "Renesas R-Car I2C driver"
|
||||
depends on (RCAR_GEN2 || RCAR_64) && DM_I2C
|
||||
help
|
||||
Support for Renesas RCar I2C controller.
|
||||
Support for Renesas R-Car I2C controller.
|
||||
|
||||
config SYS_I2C_RCAR_IIC
|
||||
bool "Renesas RCar Gen3 IIC driver"
|
||||
bool "Renesas R-Car Gen3 IIC driver"
|
||||
depends on (RCAR_GEN2 || RCAR_GEN3) && DM_I2C
|
||||
help
|
||||
Support for Renesas RCar Gen3 IIC controller.
|
||||
Support for Renesas R-Car Gen3 IIC controller.
|
||||
|
||||
config SYS_I2C_ROCKCHIP
|
||||
bool "Rockchip I2C driver"
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar IIC driver
|
||||
* Renesas R-Car IIC driver
|
||||
*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -571,7 +571,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode)
|
||||
int i, ret = 0, sret;
|
||||
u32 caps, reg;
|
||||
|
||||
/* Only supported on Renesas RCar */
|
||||
/* Only supported on Renesas R-Car */
|
||||
if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS))
|
||||
return -EINVAL;
|
||||
|
||||
|
||||
@@ -64,7 +64,7 @@
|
||||
#define TMIO_SD_CLKCTL_DIV4 BIT(0) /* SDCLK = CLK / 4 */
|
||||
#define TMIO_SD_CLKCTL_DIV2 0 /* SDCLK = CLK / 2 */
|
||||
#define TMIO_SD_CLKCTL_DIV1 BIT(10) /* SDCLK = CLK */
|
||||
#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (RCar ver.) */
|
||||
#define TMIO_SD_CLKCTL_RCAR_DIV1 0xff /* SDCLK = CLK (R-Car ver.) */
|
||||
#define TMIO_SD_CLKCTL_OFFEN BIT(9) /* stop SDCLK when unused */
|
||||
#define TMIO_SD_CLKCTL_SCLKEN BIT(8) /* SDCLK output enable */
|
||||
#define TMIO_SD_SIZE 0x04c /* block size */
|
||||
@@ -90,7 +90,7 @@
|
||||
#define TMIO_SD_VOLT_180 (2 << 0)/* 1.8V signal */
|
||||
#define TMIO_SD_DMA_MODE 0x410
|
||||
#define TMIO_SD_DMA_MODE_DIR_RD BIT(16) /* 1: from device, 0: to dev */
|
||||
#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* RCar, 64bit */
|
||||
#define TMIO_SD_DMA_MODE_BUS_WIDTH (BIT(5) | BIT(4)) /* R-Car, 64bit */
|
||||
#define TMIO_SD_DMA_MODE_ADDR_INC BIT(0) /* 1: address inc, 0: fixed */
|
||||
#define TMIO_SD_DMA_CTL 0x414
|
||||
#define TMIO_SD_DMA_CTL_START BIT(0) /* start DMA (auto cleared) */
|
||||
@@ -128,9 +128,9 @@ struct tmio_sd_priv {
|
||||
#define TMIO_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is available */
|
||||
#define TMIO_SD_CAP_64BIT BIT(3) /* Controller is 64bit */
|
||||
#define TMIO_SD_CAP_16BIT BIT(4) /* Controller is 16bit */
|
||||
#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas RCar version of IP */
|
||||
#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas RCar version of IP */
|
||||
#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas RCar UHS/SDR modes */
|
||||
#define TMIO_SD_CAP_RCAR_GEN2 BIT(5) /* Renesas R-Car version of IP */
|
||||
#define TMIO_SD_CAP_RCAR_GEN3 BIT(6) /* Renesas R-Car version of IP */
|
||||
#define TMIO_SD_CAP_RCAR_UHS BIT(7) /* Renesas R-Car UHS/SDR modes */
|
||||
#define TMIO_SD_CAP_RCAR \
|
||||
(TMIO_SD_CAP_RCAR_GEN2 | TMIO_SD_CAP_RCAR_GEN3)
|
||||
struct udevice *vqmmc_dev;
|
||||
|
||||
@@ -194,11 +194,11 @@ config ALTERA_QSPI
|
||||
"Embedded Peripherals IP User Guide" of Altera.
|
||||
|
||||
config RENESAS_RPC_HF
|
||||
bool "Renesas RCar Gen3 RPC HyperFlash driver"
|
||||
bool "Renesas R-Car Gen3 RPC HyperFlash driver"
|
||||
depends on RCAR_GEN3 && DM_MTD
|
||||
help
|
||||
This enables access to HyperFlash memory through the Renesas
|
||||
RCar Gen3 RPC controller.
|
||||
R-Car Gen3 RPC controller.
|
||||
|
||||
config HBMC_AM654
|
||||
bool "HyperBus controller driver for AM65x SoC"
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Renesas RCar Gen3 RPC HyperFlash driver
|
||||
* Renesas R-Car Gen3 RPC HyperFlash driver
|
||||
*
|
||||
* Copyright (C) 2016 Renesas Electronics Corporation
|
||||
* Copyright (C) 2016 Cogent Embedded, Inc.
|
||||
|
||||
@@ -189,19 +189,19 @@ config PCI_MSC01
|
||||
depends on TARGET_MALTA
|
||||
|
||||
config PCI_RCAR_GEN2
|
||||
bool "Renesas RCar Gen2 PCIe driver"
|
||||
bool "Renesas R-Car Gen2 PCIe driver"
|
||||
depends on RCAR_32
|
||||
help
|
||||
Say Y here if you want to enable PCIe controller support on
|
||||
Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is
|
||||
Renesas R-Car Gen2 SoCs. The PCIe controller on R-Car Gen2 is
|
||||
also used to access EHCI USB controller on the SoC.
|
||||
|
||||
config PCI_RCAR_GEN3
|
||||
bool "Renesas RCar Gen3 PCIe driver"
|
||||
bool "Renesas R-Car Gen3 PCIe driver"
|
||||
depends on RCAR_GEN3
|
||||
help
|
||||
Say Y here if you want to enable PCIe controller support on
|
||||
Renesas RCar Gen3 SoCs.
|
||||
Renesas R-Car Gen3 SoCs.
|
||||
|
||||
config PCI_SANDBOX
|
||||
bool "Sandbox PCI support"
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Renesas RCar Gen2 PCIEC driver
|
||||
* Renesas R-Car Gen2 PCIEC driver
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Renesas RCar Gen3 PCIEC driver
|
||||
* Renesas R-Car Gen3 PCIEC driver
|
||||
*
|
||||
* Copyright (C) 2018-2019 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Renesas RCar Gen2 USB PHY driver
|
||||
* Renesas R-Car Gen2 USB PHY driver
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Renesas RCar Gen3 USB PHY driver
|
||||
* Renesas R-Car Gen3 USB PHY driver
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -12,34 +12,34 @@ config PINCTRL_PFC
|
||||
available multiplex function.
|
||||
|
||||
config PINCTRL_PFC_R8A7790
|
||||
bool "Renesas RCar Gen2 R8A7790 pin control driver"
|
||||
bool "Renesas R-Car Gen2 R8A7790 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen2 R8A7790 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen2 R8A7790 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A7791
|
||||
bool "Renesas RCar Gen2 R8A7791 pin control driver"
|
||||
bool "Renesas R-Car Gen2 R8A7791 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen2 R8A7791 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen2 R8A7791 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A7792
|
||||
bool "Renesas RCar Gen2 R8A7792 pin control driver"
|
||||
bool "Renesas R-Car Gen2 R8A7792 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen2 R8A7792 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen2 R8A7792 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A7793
|
||||
bool "Renesas RCar Gen2 R8A7793 pin control driver"
|
||||
bool "Renesas R-Car Gen2 R8A7793 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen2 R8A7793 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen2 R8A7793 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A7794
|
||||
bool "Renesas RCar Gen2 R8A7794 pin control driver"
|
||||
bool "Renesas R-Car Gen2 R8A7794 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen2 R8A7794 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen2 R8A7794 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A774A1
|
||||
bool "Renesas RZ/G2 R8A774A1 pin control driver"
|
||||
@@ -66,76 +66,76 @@ config PINCTRL_PFC_R8A774E1
|
||||
Support pin multiplexing control on Renesas RZ/G2H R8A774E1 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77951
|
||||
bool "Renesas RCar Gen3 R8A7795 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A7795 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A7795 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77960
|
||||
bool "Renesas RCar Gen3 R8A77960 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77960 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77960 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77960 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77961
|
||||
bool "Renesas RCar Gen3 R8A77961 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77961 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77961 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77961 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77965
|
||||
bool "Renesas RCar Gen3 R8A77965 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77965 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77965 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77965 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77970
|
||||
bool "Renesas RCar Gen3 R8A77970 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77970 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77970 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77980
|
||||
bool "Renesas RCar Gen3 R8A77980 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77980 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77980 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77980 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77990
|
||||
bool "Renesas RCar Gen3 R8A77990 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77990 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77990 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77990 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A77995
|
||||
bool "Renesas RCar Gen3 R8A77995 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A77995 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A77995 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A779A0
|
||||
bool "Renesas RCar Gen3 R8A779A0 pin control driver"
|
||||
bool "Renesas R-Car Gen3 R8A779A0 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen3 R8A779A0 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen3 R8A779A0 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A779F0
|
||||
bool "Renesas RCar Gen4 R8A779F0 pin control driver"
|
||||
bool "Renesas R-Car Gen4 R8A779F0 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen4 R8A779F0 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen4 R8A779F0 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A779G0
|
||||
bool "Renesas RCar Gen4 R8A779G0 pin control driver"
|
||||
bool "Renesas R-Car Gen4 R8A779G0 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen4 R8A779G0 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen4 R8A779G0 SoCs.
|
||||
|
||||
config PINCTRL_PFC_R8A779H0
|
||||
bool "Renesas RCar Gen4 R8A779H0 pin control driver"
|
||||
bool "Renesas R-Car Gen4 R8A779H0 pin control driver"
|
||||
depends on PINCTRL_PFC
|
||||
help
|
||||
Support pin multiplexing control on Renesas RCar Gen4 R8A779H0 SoCs.
|
||||
Support pin multiplexing control on Renesas R-Car Gen4 R8A779H0 SoCs.
|
||||
|
||||
config PINCTRL_RZA1
|
||||
bool "Renesas RZ/A1 R7S72100 pin control driver"
|
||||
|
||||
@@ -920,7 +920,7 @@ config SCIF_CONSOLE
|
||||
depends on SH || ARCH_RENESAS
|
||||
help
|
||||
Select this to enable Renesas SCIF UART. To operate serial ports
|
||||
on systems with RCar or SH SoCs, say Y to this option. If unsure,
|
||||
on systems with R-Car or SH SoCs, say Y to this option. If unsure,
|
||||
say N.
|
||||
|
||||
choice
|
||||
|
||||
@@ -420,7 +420,7 @@ config RENESAS_RPC_SPI
|
||||
imply SPI_FLASH_SFDP_SUPPORT
|
||||
help
|
||||
Enable the Renesas RPC SPI driver, used to access SPI NOR flash
|
||||
on Renesas RCar Gen3 SoCs. This uses driver model and requires a
|
||||
on Renesas R-Car Gen3 SoCs. This uses driver model and requires a
|
||||
device tree binding to operate.
|
||||
|
||||
config ROCKCHIP_SFC
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Renesas RCar Gen3 RPC QSPI driver
|
||||
* Renesas R-Car Gen3 RPC QSPI driver
|
||||
*
|
||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||
*/
|
||||
|
||||
@@ -115,10 +115,10 @@ config USB_GADGET_DWC2_OTG
|
||||
USB_GADGET to be enabled.
|
||||
|
||||
config USB_RENESAS_USBHS
|
||||
bool "Renesas RCar USB2.0 HS controller (gadget mode)"
|
||||
bool "Renesas R-Car USB2.0 HS controller (gadget mode)"
|
||||
select USB_GADGET_DUALSPEED
|
||||
help
|
||||
The Renesas Rcar USB 2.0 high-speed gadget controller
|
||||
The Renesas R-Car USB 2.0 high-speed gadget controller
|
||||
integrated into Salvator and Kingfisher boards. Select this
|
||||
option if you want the driver to operate in Peripheral mode.
|
||||
This option requires USB_GADGET to be enabled.
|
||||
|
||||
@@ -103,12 +103,12 @@ config USB_XHCI_PCI
|
||||
Enables support for the PCI-based xHCI controller.
|
||||
|
||||
config USB_XHCI_RCAR
|
||||
bool "Renesas RCar USB 3.0 support"
|
||||
bool "Renesas R-Car USB 3.0 support"
|
||||
default y
|
||||
depends on ARCH_RENESAS
|
||||
help
|
||||
Choose this option to add support for USB 3.0 driver on Renesas
|
||||
RCar Gen3 SoCs.
|
||||
R-Car Gen3 SoCs.
|
||||
|
||||
config USB_XHCI_STI
|
||||
bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Renesas RCar xHCI controller firmware version 3
|
||||
* Renesas R-Car xHCI controller firmware version 3
|
||||
*
|
||||
* Copyright (c) 2014, Renesas Electronics Corporation
|
||||
* All rights reserved.
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
|
||||
*
|
||||
* Renesas RCar USB HOST xHCI Controller
|
||||
* Renesas R-Car USB HOST xHCI Controller
|
||||
*/
|
||||
|
||||
#include <clk.h>
|
||||
|
||||
Reference in New Issue
Block a user