ppc4xx: Big header cleanup part 2, mostly PPC405 related

This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.

Signed-off-by: Stefan Roese <sr@denx.de>

board/mpl/mip405/init.S

@@ -39,8 +39,6 @@
  *	Bank 6 - not used
  *	Bank 7 - PLD Register
  *-----------------------------------------------------------------------------*/
-#include <asm/ppc4xx.h>
-
 #define _LINUX_CONFIG_H 1	/* avoid reading Linux autoconf.h file	*/
 
 #include <configs/MIP405.h>
@@ -49,6 +47,7 @@
 
 #include <asm/cache.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 #include "mip405.h"
 
 

board/mpl/mip405/mip405.c

@@ -65,6 +65,7 @@
 #include <common.h>
 #include "mip405.h"
 #include <asm/processor.h>
+#include <asm/ppc4xx.h>
 #include <asm/ppc4xx-i2c.h>
 #include <miiphy.h>
 #include "../common/common_util.h"

board/mpl/pip405/init.S

@@ -39,8 +39,6 @@
  *	Bank 6 - used to switch on the 12V for the Multipurpose socket
  *	Bank 7 - Config Register
  *-----------------------------------------------------------------------------*/
-#include <asm/ppc4xx.h>
-
 #define _LINUX_CONFIG_H 1	/* avoid reading Linux autoconf.h file	*/
 
 #include <configs/PIP405.h>
@@ -49,6 +47,7 @@
 
 #include <asm/cache.h>
 #include <asm/mmu.h>
+#include <asm/ppc4xx.h>
 #include "pip405.h"
 
   .globl ext_bus_cntlr_init