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Set SDelay register in the DDR controller for the MPC5200B chip.

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Rafal Jaworowski
2006-03-29 13:17:09 +02:00
parent 7b4fd36b03
commit b66a938342
4 changed files with 32 additions and 8 deletions
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include/mpc5xxx.h
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@@ -131,6 +131,7 @@
#if defined(CONFIG_MGT5100)
#define MPC5XXX_SDRAM_XLBSEL (MPC5XXX_SDRAM + 0x0010)
#endif
#define MPC5XXX_SDRAM_SDELAY (MPC5XXX_SDRAM + 0x0090)
/* Clock Distribution Module */
#define MPC5XXX_CDM_JTAGID (MPC5XXX_CDM + 0x0000)