video: mb862xx: improve board-specific Lime configuration
To avoid board-specific code accessing the mb862xx registers directly, the public function mb862xx_probe() has been introduced. Furthermore, the "Change of Clock Frequency" and "Set Memory I/F Mode" registers are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR, respectively. The BSPs for the socrates and lwmon5 boards have been adapted accordingly. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
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committed by
Anatolij Gustschin
parent
f2b4bc04d6
commit
c28d3bbe96
@@ -268,17 +268,6 @@ ft_board_setup(void *blob, bd_t *bd)
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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#define CONFIG_SYS_LIME_SRST ((CONFIG_SYS_LIME_BASE) + 0x01FC002C)
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#define CONFIG_SYS_LIME_CCF ((CONFIG_SYS_LIME_BASE) + 0x01FC0038)
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#define CONFIG_SYS_LIME_MMR ((CONFIG_SYS_LIME_BASE) + 0x01FCFFFC)
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/* Lime clock frequency */
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#define CONFIG_SYS_LIME_CLK_100MHZ 0x00000
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#define CONFIG_SYS_LIME_CLK_133MHZ 0x10000
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/* SDRAM parameter */
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#define CONFIG_SYS_LIME_MMR_VALUE 0x4157BA63
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#define DISPLAY_WIDTH 800
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#define DISPLAY_HEIGHT 480
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#define DEFAULT_BRIGHTNESS 25
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#define BACKLIGHT_ENABLE (1 << 31)
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@@ -308,14 +297,12 @@ const gdc_regs *board_get_regs (void)
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return init_regs;
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}
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#define CONFIG_SYS_LIME_CID ((CONFIG_SYS_LIME_BASE) + 0x01FC00F0)
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#define CONFIG_SYS_LIME_REV ((CONFIG_SYS_LIME_BASE) + 0x01FF8084)
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int lime_probe(void)
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{
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volatile ccsr_lbc_t *memctl = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
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uint cfg_br2;
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uint cfg_or2;
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uint reg;
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int type;
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cfg_br2 = memctl->br2;
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cfg_or2 = memctl->or2;
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@@ -325,21 +312,15 @@ int lime_probe(void)
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memctl->or2 = 0xfc000410;
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memctl->br2 = (CONFIG_SYS_LIME_BASE) | 0x00001901;
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/* Try to access GDC ID/Revision registers */
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reg = in_be32((void *)CONFIG_SYS_LIME_CID);
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reg = in_be32((void *)CONFIG_SYS_LIME_CID);
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if (reg == 0x303) {
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reg = in_be32((void *)CONFIG_SYS_LIME_REV);
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reg = in_be32((void *)CONFIG_SYS_LIME_REV);
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reg = ((reg & ~0xff) == 0x20050100) ? 1 : 0;
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} else
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reg = 0;
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/* Get controller type */
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type = mb862xx_probe(CONFIG_SYS_LIME_BASE);
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/* Restore previous CS2 configuration */
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memctl->br2 = 0;
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memctl->or2 = cfg_or2;
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memctl->br2 = cfg_br2;
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return reg;
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return (type == MB862XX_TYPE_LIME) ? 1 : 0;
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}
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/* Returns Lime base address */
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@@ -348,21 +329,8 @@ unsigned int board_video_init (void)
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if (!lime_probe())
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return 0;
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/*
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* Reset Lime controller
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*/
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out_be32((void *)CONFIG_SYS_LIME_SRST, 0x1);
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udelay(200);
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/* Set Lime clock to 133MHz */
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out_be32((void *)CONFIG_SYS_LIME_CCF, CONFIG_SYS_LIME_CLK_133MHZ);
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/* Delay required */
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udelay(300);
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/* Set memory parameters */
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out_be32((void *)CONFIG_SYS_LIME_MMR, CONFIG_SYS_LIME_MMR_VALUE);
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mb862xx.winSizeX = DISPLAY_WIDTH;
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mb862xx.winSizeY = DISPLAY_HEIGHT;
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mb862xx.winSizeX = 800;
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mb862xx.winSizeY = 480;
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mb862xx.gdfIndex = GDF_15BIT_555RGB;
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mb862xx.gdfBytesPP = 2;
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