Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location
This commit is contained in:
Tom Rini
2022-06-27 10:15:50 -04:00
76 changed files with 5312 additions and 3332 deletions

View File

@@ -279,4 +279,13 @@ config IMX_GPT_TIMER
Select this to enable support for the timer found on
NXP i.MX devices.
config XILINX_TIMER
bool "Xilinx timer support"
depends on TIMER
select REGMAP
select SPL_REGMAP if SPL
help
Select this to enable support for the timer found on
any Xilinx boards (axi timer).
endmenu