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WS cleanup: remove excessive empty lines

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Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
2021-09-27 17:42:37 +02:00
committed by Tom Rini
parent 66356b4c06
commit c72231d272
27 changed files with 0 additions and 64 deletions
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2
arch/xtensa/include/asm/arch-dc232b/core.h
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@@ -127,8 +127,6 @@
#define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/

4
arch/xtensa/include/asm/arch-dc232b/tie-asm.h
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@@ -26,7 +26,6 @@
#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */
/* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
* Save area ptr (clobbered): ptr (1 byte aligned)
@@ -109,11 +108,8 @@
.endif
.endm // xchal_ncp_load
#define XCHAL_NCP_NUM_ATMPS 2
#define XCHAL_SA_NUM_ATMPS 2
#endif /*_XTENSA_CORE_TIE_ASM_H*/

3
arch/xtensa/include/asm/arch-dc233c/core.h
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@@ -149,13 +149,10 @@
#define XCHAL_HAVE_PREFETCH 0 /* PREFCTL register */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------

4
arch/xtensa/include/asm/arch-dc233c/tie-asm.h
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@@ -31,8 +31,6 @@
| ((ccuse) & XTHAL_SAS_ANYCC) \
| ((abi) & XTHAL_SAS_ANYABI) )
/*
* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
@@ -164,8 +162,6 @@
#define XCHAL_NCP_NUM_ATMPS 1
#define XCHAL_SA_NUM_ATMPS 1
#endif /*_XTENSA_CORE_TIE_ASM_H*/

3
arch/xtensa/include/asm/arch-de212/core.h
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@@ -206,13 +206,10 @@
#define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------

2
arch/xtensa/include/asm/cacheasm.h
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@@ -134,7 +134,6 @@
.endm
.macro ___flush_invalidate_dcache_range ar as at
#if XCHAL_DCACHE_SIZE
@@ -171,7 +170,6 @@
.endm
.macro ___flush_invalidate_dcache_page ar as
#if XCHAL_DCACHE_SIZE