Power: remove support for Freescale MPC8220
The Freescale MPC8220 Power Architecture processors have long reached EOL; Freescale does not even list these any more on their web site. Remove the code to avoid wasting maitaining efforts on dead stuff. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andy Fleming <afleming@gmail.com>
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@@ -301,9 +301,6 @@ static init_fnc_t *init_sequence[] = {
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#if defined(CONFIG_MPC5xxx)
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prt_mpc5xxx_clks,
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#endif /* CONFIG_MPC5xxx */
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#if defined(CONFIG_MPC8220)
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prt_mpc8220_clks,
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#endif
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checkboard,
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INIT_FUNC_WATCHDOG_INIT
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#if defined(CONFIG_MISC_INIT_F)
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@@ -548,27 +545,6 @@ void board_init_f(ulong bootflag)
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#if defined(CONFIG_MPC83xx)
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bd->bi_immrbar = CONFIG_SYS_IMMR;
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#endif
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#if defined(CONFIG_MPC8220)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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bd->bi_inpfreq = gd->arch.inp_clk;
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bd->bi_pcifreq = gd->pci_clk;
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bd->bi_vcofreq = gd->arch.vco_clk;
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bd->bi_pevfreq = gd->arch.pev_clk;
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bd->bi_flbfreq = gd->arch.flb_clk;
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/* store bootparam to sram (backward compatible), here? */
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{
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u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
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*sram++ = gd->ram_size;
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*sram++ = gd->bus_clk;
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*sram++ = gd->arch.inp_clk;
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*sram++ = gd->cpu_clk;
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*sram++ = gd->arch.vco_clk;
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*sram++ = gd->arch.flb_clk;
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*sram++ = 0xb8c3ba11; /* boot signature */
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}
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#endif
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WATCHDOG_RESET();
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bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
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@@ -286,13 +286,6 @@ static void set_clocks_in_mhz (bd_t *kbd)
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/* convert all clock information to MHz */
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kbd->bi_intfreq /= 1000000L;
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kbd->bi_busfreq /= 1000000L;
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#if defined(CONFIG_MPC8220)
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kbd->bi_inpfreq /= 1000000L;
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kbd->bi_pcifreq /= 1000000L;
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kbd->bi_pevfreq /= 1000000L;
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kbd->bi_flbfreq /= 1000000L;
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kbd->bi_vcofreq /= 1000000L;
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#endif
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#if defined(CONFIG_CPM2)
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kbd->bi_cpmfreq /= 1000000L;
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kbd->bi_brgfreq /= 1000000L;
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