global: Migrate CONFIG_MXC_USB_FLAGS et al to CFG
Perform simple renames of: CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -299,10 +299,10 @@ static int ehci_usb_probe(struct udevice *dev)
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HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
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setbits_le32(&ehci->usbmode, CM_HOST);
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__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
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__raw_writel(CFG_MXC_USB_PORTSC, &ehci->portsc);
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setbits_le32(&ehci->portsc, USB_EN);
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mxc_set_usbcontrol(priv->portnr, CONFIG_MXC_USB_FLAGS);
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mxc_set_usbcontrol(priv->portnr, CFG_MXC_USB_FLAGS);
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mdelay(10);
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return ehci_register(dev, hccr, hcor, &mx5_ehci_ops, 0,
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@@ -70,8 +70,8 @@ DECLARE_GLOBAL_DATA_PTR;
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#define UCMD_RESET (1 << 1) /* controller reset */
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/* If this is not defined, assume MX6/MX7/MX8M SoC default */
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#ifndef CONFIG_MXC_USB_PORTSC
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#ifndef CFG_MXC_USB_PORTSC
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#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#endif
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/* Base address for this IP block is 0x02184800 */
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@@ -411,7 +411,7 @@ int ehci_hcd_init(int index, enum usb_init_type init,
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return 0;
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setbits_le32(&ehci->usbmode, CM_HOST);
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writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
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writel(CFG_MXC_USB_PORTSC, &ehci->portsc);
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setbits_le32(&ehci->portsc, USB_EN);
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mdelay(10);
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@@ -454,7 +454,7 @@ static u32 mx6_portsc(enum usb_phy_interface phy_type)
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case USBPHY_INTERFACE_MODE_HSIC:
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return PORT_PTS_HSIC;
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default:
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return CONFIG_MXC_USB_PORTSC;
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return CFG_MXC_USB_PORTSC;
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}
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}
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