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Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

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This commit is contained in:
Albert ARIBAUD
2014-07-01 15:11:18 +02:00
parent d6694aff56 12cc543767
commit e99f30e105
45 changed files with 255 additions and 258 deletions
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79
board/ti/am43xx/board.c
View File

@@ -217,6 +217,28 @@ const struct emif_regs ddr3_emif_regs_400Mhz = {
.emif_rd_wr_exec_thresh = 0x00000405
};
static const struct emif_regs ddr3_sk_emif_regs_400Mhz = {
.sdram_config = 0x638413b2,
.sdram_config2 = 0x00000000,
.ref_ctrl = 0x00000c30,
.sdram_tim1 = 0xeaaad4db,
.sdram_tim2 = 0x266b7fda,
.sdram_tim3 = 0x107f8678,
.read_idle_ctrl = 0x00050000,
.zq_config = 0x50074be4,
.temp_alert_config = 0x0,
.emif_ddr_phy_ctlr_1 = 0x0e084008,
.emif_ddr_ext_phy_ctrl_1 = 0x08020080,
.emif_ddr_ext_phy_ctrl_2 = 0x89,
.emif_ddr_ext_phy_ctrl_3 = 0x90,
.emif_ddr_ext_phy_ctrl_4 = 0x8e,
.emif_ddr_ext_phy_ctrl_5 = 0x8d,
.emif_rd_wr_lvl_rmp_win = 0x0,
.emif_rd_wr_lvl_rmp_ctl = 0x00000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
.emif_rd_wr_exec_thresh = 0x00000000,
};
const u32 ext_phy_ctrl_const_base_ddr3[] = {
0x00400040,
0x00350035,
@@ -240,6 +262,48 @@ const u32 ext_phy_ctrl_const_base_ddr3[] = {
0x08102040
};
static const u32 ext_phy_ctrl_const_base_ddr3_sk[] = {
/* first 5 are taken care by emif_regs */
0x00700070,
0x00350035,
0x00350035,
0x00350035,
0x00350035,
0x00350035,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00150015,
0x00150015,
0x00150015,
0x00150015,
0x00150015,
0x00800080,
0x00800080,
0x40000000,
0x08102040,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
{
if (board_is_eposevm()) {
@@ -248,6 +312,9 @@ void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
} else if (board_is_gpevm()) {
*regs = ext_phy_ctrl_const_base_ddr3;
*size = ARRAY_SIZE(ext_phy_ctrl_const_base_ddr3);
} else if (board_is_sk()) {
*regs = ext_phy_ctrl_const_base_ddr3_sk;
*size = ARRAY_SIZE(ext_phy_ctrl_const_base_ddr3_sk);
}
return;
@@ -257,10 +324,10 @@ const struct dpll_params *get_dpll_ddr_params(void)
{
if (board_is_eposevm())
return &epos_evm_dpll_ddr;
else if (board_is_gpevm())
else if (board_is_gpevm() || board_is_sk())
return &gp_evm_dpll_ddr;
puts(" Board not supported\n");
printf(" Board '%s' not supported\n", am43xx_board_name);
return NULL;
}
@@ -410,6 +477,9 @@ void sdram_init(void)
enable_vtt_regulator();
config_ddr(0, &ioregs_ddr3, NULL, NULL,
&ddr3_emif_regs_400Mhz, 0);
} else if (board_is_sk()) {
config_ddr(400, &ioregs_ddr3, NULL, NULL,
&ddr3_sk_emif_regs_400Mhz, 0);
}
}
#endif
@@ -524,6 +594,11 @@ int board_eth_init(bd_t *bis)
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
cpsw_slaves[0].phy_addr = 16;
} else if (board_is_sk()) {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
cpsw_slaves[0].phy_addr = 4;
cpsw_slaves[1].phy_addr = 5;
} else {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;

5
board/ti/am43xx/board.h
View File

@@ -47,6 +47,11 @@ static inline int board_is_gpevm(void)
return !strncmp(am43xx_board_name, "AM43__GP", HDR_NAME_LEN);
}
static inline int board_is_sk(void)
{
return !strncmp(am43xx_board_name, "AM43__SK", HDR_NAME_LEN);
}
void enable_uart0_pin_mux(void);
void enable_board_pin_mux(void);
void enable_i2c0_pin_mux(void);

3
board/ti/am43xx/mux.c
View File

@@ -97,6 +97,9 @@ void enable_board_pin_mux(void)
if (board_is_gpevm()) {
configure_module_pin_mux(gpio5_7_pin_mux);
configure_module_pin_mux(rgmii1_pin_mux);
} else if (board_is_sk()) {
configure_module_pin_mux(rgmii1_pin_mux);
configure_module_pin_mux(qspi_pin_mux);
} else if (board_is_eposevm()) {
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(qspi_pin_mux);

10
board/ti/k2hk_evm/board.c
View File

@@ -16,9 +16,9 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/nand_defs.h>
#include <asm/arch/emac_defs.h>
#include <asm/arch/psc_defs.h>
#include <asm/ti-common/ti-aemif.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -40,9 +40,9 @@ unsigned int external_clk[ext_clk_count] = {
what is that */
};
static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
static struct aemif_config aemif_configs[] = {
{ /* CS0 */
.mode = ASYNC_EMIF_MODE_NAND,
.mode = AEMIF_MODE_NAND,
.wr_setup = 0xf,
.wr_strobe = 0x3f,
.wr_hold = 7,
@@ -50,7 +50,7 @@ static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
.rd_strobe = 0x3f,
.rd_hold = 7,
.turn_around = 3,
.width = ASYNC_EMIF_8,
.width = AEMIF_WIDTH_8,
},
};
@@ -67,7 +67,7 @@ int dram_init(void)
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
return 0;
}

2
board/ti/tnetv107xevm/sdb_board.c
View File

@@ -11,7 +11,7 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/nand_defs.h>
#include <asm/ti-common/davinci_nand.h>
#include <asm/arch/mux.h>
DECLARE_GLOBAL_DATA_PTR;