Patches by Stephan Linz, 30 Jan 2004:
1: - board/altera/common/flash.c:flash_erase():
o allow interrupts befor get_timer() call
o check-up each erased sector and avoid unexpected timeouts
- board/altera/dk1c20/dk1s10.c:board_early_init_f():
o enclose sevenseg_set() in cpp condition
- remove the ASMI configuration for DK1S10_standard_32 (never present)
- fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
NIOS CPU configuration at the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
(master only)
7: - Add support for the common U-Boot SPI framework at
RTC driver DS1306
This commit is contained in:
497
rtc/ds1306.c
497
rtc/ds1306.c
@@ -1,6 +1,9 @@
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/*
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* (C) Copyright 2002 SIXNET, dge@sixnetio.com.
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*
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* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
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* Stephan Linz <linz@li-pro.net>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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@@ -21,20 +24,66 @@
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*/
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/*
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* Date & Time support for DS1306 RTC using software SPI
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* Date & Time support for DS1306 RTC using SPI:
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*
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* - SXNI855T: it uses its own soft SPI here in this file
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* - all other: use the external spi_xfer() function
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* (see include/spi.h)
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <spi.h>
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#if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)
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static unsigned int bin2bcd(unsigned int n);
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static unsigned char bcd2bin(unsigned char c);
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static void soft_spi_send(unsigned char n);
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static unsigned char soft_spi_read(void);
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static void init_spi(void);
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#define RTC_SECONDS 0x00
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#define RTC_MINUTES 0x01
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#define RTC_HOURS 0x02
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#define RTC_DAY_OF_WEEK 0x03
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#define RTC_DATE_OF_MONTH 0x04
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#define RTC_MONTH 0x05
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#define RTC_YEAR 0x06
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#define RTC_SECONDS_ALARM0 0x07
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#define RTC_MINUTES_ALARM0 0x08
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#define RTC_HOURS_ALARM0 0x09
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#define RTC_DAY_OF_WEEK_ALARM0 0x0a
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#define RTC_SECONDS_ALARM1 0x0b
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#define RTC_MINUTES_ALARM1 0x0c
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#define RTC_HOURS_ALARM1 0x0d
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#define RTC_DAY_OF_WEEK_ALARM1 0x0e
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#define RTC_CONTROL 0x0f
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#define RTC_STATUS 0x10
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#define RTC_TRICKLE_CHARGER 0x11
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#define RTC_USER_RAM_BASE 0x20
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/*
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* External table of chip select functions (see the appropriate board
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* support for the actual definition of the table).
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*/
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extern spi_chipsel_type spi_chipsel[];
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extern int spi_chipsel_cnt;
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static unsigned int bin2bcd (unsigned int n);
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static unsigned char bcd2bin (unsigned char c);
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static unsigned char rtc_read (unsigned char reg);
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static void rtc_write (unsigned char reg, unsigned char val);
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/* ************************************************************************* */
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#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
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static void soft_spi_send (unsigned char n);
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static unsigned char soft_spi_read (void);
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static void init_spi (void);
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/*-----------------------------------------------------------------------
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* Definitions
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@@ -48,227 +97,349 @@ static void init_spi(void);
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/* ------------------------------------------------------------------------- */
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/* read clock time from DS1306 and return it in *tmp */
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void rtc_get(struct rtc_time *tmp)
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void rtc_get (struct rtc_time *tmp)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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unsigned char spi_byte; /* Data Byte */
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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unsigned char spi_byte; /* Data Byte */
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init_spi(); /* set port B for software SPI */
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init_spi (); /* set port B for software SPI */
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay(10);
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay (10);
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/* Shift out the address (0) of the time in the Clock Chip */
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soft_spi_send(0);
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/* Shift out the address (0) of the time in the Clock Chip */
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soft_spi_send (0);
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/* Put the clock readings into the rtc_time structure */
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tmp->tm_sec = bcd2bin(soft_spi_read()); /* Read seconds */
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tmp->tm_min = bcd2bin(soft_spi_read()); /* Read minutes */
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/* Put the clock readings into the rtc_time structure */
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tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
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tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
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/* Hours are trickier */
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spi_byte = soft_spi_read(); /* Read Hours into temporary value */
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if (spi_byte & 0x40) {
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/* 12 hour mode bit is set (time is in 1-12 format) */
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if (spi_byte & 0x20) {
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/* since PM we add 11 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin(spi_byte & 0x1F)) + 11;
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/* Hours are trickier */
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spi_byte = soft_spi_read (); /* Read Hours into temporary value */
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if (spi_byte & 0x40) {
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/* 12 hour mode bit is set (time is in 1-12 format) */
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if (spi_byte & 0x20) {
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/* since PM we add 11 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
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} else {
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/* since AM we subtract 1 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
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}
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} else {
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/* Otherwise, 0-23 hour format */
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tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
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}
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else {
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/* since AM we subtract 1 to get 0-23 for hours */
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tmp->tm_hour = (bcd2bin(spi_byte & 0x1F)) - 1;
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}
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}
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else {
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/* Otherwise, 0-23 hour format */
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tmp->tm_hour = (bcd2bin(spi_byte & 0x3F));
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}
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soft_spi_read(); /* Read and discard Day of week */
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tmp->tm_mday = bcd2bin(soft_spi_read()); /* Read Day of the Month */
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tmp->tm_mon = bcd2bin(soft_spi_read()); /* Read Month */
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soft_spi_read (); /* Read and discard Day of week */
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tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
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tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
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/* Read Year and convert to this century */
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tmp->tm_year = bcd2bin(soft_spi_read()) + 2000;
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/* Read Year and convert to this century */
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tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
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/* Now we can disable the DS1306 RTC */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay(10);
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/* Now we can disable the DS1306 RTC */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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GregorianDay(tmp); /* Determine the day of week */
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GregorianDay (tmp); /* Determine the day of week */
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debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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}
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/* ------------------------------------------------------------------------- */
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/* set clock time in DS1306 RTC and in MPC8xx RTC */
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void rtc_set(struct rtc_time *tmp)
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void rtc_set (struct rtc_time *tmp)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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init_spi(); /* set port B for software SPI */
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init_spi (); /* set port B for software SPI */
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay(10);
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/* Now we can enable the DS1306 RTC */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay (10);
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/* First disable write protect in the clock chip control register */
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soft_spi_send(0x8F); /* send address of the control register */
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soft_spi_send(0x00); /* send control register contents */
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/* First disable write protect in the clock chip control register */
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soft_spi_send (0x8F); /* send address of the control register */
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soft_spi_send (0x00); /* send control register contents */
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/* Now disable the DS1306 to terminate the write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
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udelay(10);
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/* Now disable the DS1306 to terminate the write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
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udelay (10);
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/* Now enable the DS1306 to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay(10);
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/* Now enable the DS1306 to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE;
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udelay (10);
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/* Next, send the address of the clock time write registers */
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soft_spi_send(0x80); /* send address of the first time register */
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/* Next, send the address of the clock time write registers */
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soft_spi_send (0x80); /* send address of the first time register */
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/* Use Burst Mode to send all of the time data to the clock */
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bin2bcd(tmp->tm_sec);
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soft_spi_send(bin2bcd(tmp->tm_sec)); /* Send Seconds */
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soft_spi_send(bin2bcd(tmp->tm_min)); /* Send Minutes */
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soft_spi_send(bin2bcd(tmp->tm_hour)); /* Send Hour */
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soft_spi_send(bin2bcd(tmp->tm_wday)); /* Send Day of the Week */
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soft_spi_send(bin2bcd(tmp->tm_mday)); /* Send Day of Month */
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soft_spi_send(bin2bcd(tmp->tm_mon)); /* Send Month */
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soft_spi_send(bin2bcd(tmp->tm_year - 2000)); /* Send Year */
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/* Use Burst Mode to send all of the time data to the clock */
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bin2bcd (tmp->tm_sec);
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soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
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soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
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soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
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soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
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soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
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soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
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soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
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/* Now we can disable the Clock chip to terminate the burst write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay(10);
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/* Now we can disable the Clock chip to terminate the burst write */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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/* Now we can enable the Clock chip to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay(10);
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/* Now we can enable the Clock chip to initiate a new write */
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immap->im_cpm.cp_pbdat |= PB_SPI_CE; /* Enable DS1306 Chip */
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udelay (10);
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/* First we Enable write protect in the clock chip control register */
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soft_spi_send(0x8F); /* send address of the control register */
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soft_spi_send(0x40); /* send out Control Register contents */
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/* First we Enable write protect in the clock chip control register */
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soft_spi_send (0x8F); /* send address of the control register */
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soft_spi_send (0x40); /* send out Control Register contents */
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/* Now disable the DS1306 */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay(10);
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/* Now disable the DS1306 */
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immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
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udelay (10);
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/* Set standard MPC8xx clock to the same time so Linux will
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* see the time even if it doesn't have a DS1306 clock driver.
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* This helps with experimenting with standard kernels.
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*/
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{
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ulong tim;
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/* Set standard MPC8xx clock to the same time so Linux will
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* see the time even if it doesn't have a DS1306 clock driver.
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* This helps with experimenting with standard kernels.
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*/
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{
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ulong tim;
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tim = mktime(tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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immap->im_sitk.sitk_rtck = KAPWR_KEY;
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immap->im_sit.sit_rtc = tim;
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}
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immap->im_sitk.sitk_rtck = KAPWR_KEY;
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immap->im_sit.sit_rtc = tim;
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}
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debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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}
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/* ------------------------------------------------------------------------- */
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void rtc_reset(void)
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{
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return; /* nothing to do */
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}
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/* ------------------------------------------------------------------------- */
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static unsigned char bcd2bin(unsigned char n)
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{
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return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
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}
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/* ------------------------------------------------------------------------- */
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static unsigned int bin2bcd(unsigned int n)
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{
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return (((n / 10) << 4) | (n % 10));
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debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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}
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/* ------------------------------------------------------------------------- */
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/* Initialize Port B for software SPI */
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static void init_spi(void) {
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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static void init_spi (void)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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/* Force output pins to begin at logic 0 */
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immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
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/* Force output pins to begin at logic 0 */
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immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);
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/* Set these 3 signals as outputs */
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immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
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/* Set these 3 signals as outputs */
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immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
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immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
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udelay(10);
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immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
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udelay (10);
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}
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/* ------------------------------------------------------------------------- */
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/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
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static void soft_spi_send(unsigned char n)
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static void soft_spi_send (unsigned char n)
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{
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volatile immap_t *immap = (immap_t *)CFG_IMMR;
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unsigned char bitpos; /* bit position to receive */
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unsigned char i; /* Loop Control */
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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unsigned char bitpos; /* bit position to receive */
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unsigned char i; /* Loop Control */
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/* bit position to send, start with most significant bit */
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bitpos = 0x80;
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/* bit position to send, start with most significant bit */
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bitpos = 0x80;
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/* Send 8 bits to software SPI */
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for (i = 0; i < 8; i++) { /* Loop for 8 bits */
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immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
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/* Send 8 bits to software SPI */
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for (i = 0; i < 8; i++) { /* Loop for 8 bits */
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immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
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if (n & bitpos)
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immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
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else
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immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
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udelay(10);
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if (n & bitpos)
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immap->im_cpm.cp_pbdat |= PB_SPIMOSI; /* Set MOSI to 1 */
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else
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immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
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udelay (10);
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immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
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udelay(10);
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immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
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udelay (10);
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|
||||
bitpos >>= 1; /* Shift for next bit position */
|
||||
}
|
||||
bitpos >>= 1; /* Shift for next bit position */
|
||||
}
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
|
||||
static unsigned char soft_spi_read(void)
|
||||
static unsigned char soft_spi_read (void)
|
||||
{
|
||||
volatile immap_t *immap = (immap_t *)CFG_IMMR;
|
||||
volatile immap_t *immap = (immap_t *) CFG_IMMR;
|
||||
|
||||
unsigned char spi_byte = 0; /* Return value, assume success */
|
||||
unsigned char bitpos; /* bit position to receive */
|
||||
unsigned char i; /* Loop Control */
|
||||
unsigned char spi_byte = 0; /* Return value, assume success */
|
||||
unsigned char bitpos; /* bit position to receive */
|
||||
unsigned char i; /* Loop Control */
|
||||
|
||||
/* bit position to receive, start with most significant bit */
|
||||
bitpos = 0x80;
|
||||
/* bit position to receive, start with most significant bit */
|
||||
bitpos = 0x80;
|
||||
|
||||
/* Read 8 bits here */
|
||||
for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
|
||||
immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
|
||||
udelay(10);
|
||||
if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
|
||||
spi_byte |= bitpos; /* Set data accordingly */
|
||||
immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
|
||||
udelay(10);
|
||||
bitpos >>= 1; /* Shift for next bit position */
|
||||
}
|
||||
/* Read 8 bits here */
|
||||
for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
|
||||
immap->im_cpm.cp_pbdat |= PB_SPISCK; /* Raise SCK */
|
||||
udelay (10);
|
||||
if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
|
||||
spi_byte |= bitpos; /* Set data accordingly */
|
||||
immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
|
||||
udelay (10);
|
||||
bitpos >>= 1; /* Shift for next bit position */
|
||||
}
|
||||
|
||||
return spi_byte; /* Return the byte read */
|
||||
return spi_byte; /* Return the byte read */
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
void rtc_reset (void)
|
||||
{
|
||||
return; /* nothing to do */
|
||||
}
|
||||
|
||||
#else /* not CONFIG_SXNI855T */
|
||||
/* ************************************************************************* */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* read clock time from DS1306 and return it in *tmp */
|
||||
void rtc_get (struct rtc_time *tmp)
|
||||
{
|
||||
unsigned char sec, min, hour, mday, wday, mon, year;
|
||||
|
||||
sec = rtc_read (RTC_SECONDS);
|
||||
min = rtc_read (RTC_MINUTES);
|
||||
hour = rtc_read (RTC_HOURS);
|
||||
mday = rtc_read (RTC_DATE_OF_MONTH);
|
||||
wday = rtc_read (RTC_DAY_OF_WEEK);
|
||||
mon = rtc_read (RTC_MONTH);
|
||||
year = rtc_read (RTC_YEAR);
|
||||
|
||||
debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
|
||||
"hr: %02x min: %02x sec: %02x\n",
|
||||
year, mon, mday, wday, hour, min, sec);
|
||||
debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
|
||||
rtc_read (RTC_DAY_OF_WEEK_ALARM0),
|
||||
rtc_read (RTC_HOURS_ALARM0),
|
||||
rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
|
||||
debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
|
||||
rtc_read (RTC_DAY_OF_WEEK_ALARM1),
|
||||
rtc_read (RTC_HOURS_ALARM1),
|
||||
rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
|
||||
|
||||
tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
|
||||
tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
|
||||
|
||||
/* convert Hours */
|
||||
tmp->tm_hour = (hour & 0x40)
|
||||
? ((hour & 0x20) /* 12 hour mode */
|
||||
? bcd2bin (hour & 0x1F) + 11 /* PM */
|
||||
: bcd2bin (hour & 0x1F) - 1 /* AM */
|
||||
)
|
||||
: bcd2bin (hour & 0x3F); /* 24 hour mode */
|
||||
|
||||
tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
|
||||
tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
|
||||
tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
|
||||
tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
|
||||
tmp->tm_yday = 0;
|
||||
tmp->tm_isdst = 0;
|
||||
|
||||
debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
|
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
|
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/* set clock time from *tmp in DS1306 RTC */
|
||||
void rtc_set (struct rtc_time *tmp)
|
||||
{
|
||||
debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
|
||||
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
|
||||
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
|
||||
|
||||
rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
|
||||
rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
|
||||
rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
|
||||
rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
|
||||
rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
|
||||
rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
|
||||
rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/* reset the DS1306 */
|
||||
void rtc_reset (void)
|
||||
{
|
||||
/* clear the control register */
|
||||
rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
|
||||
rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
|
||||
|
||||
/* reset all alarms */
|
||||
rtc_write (RTC_SECONDS_ALARM0, 0x00);
|
||||
rtc_write (RTC_SECONDS_ALARM1, 0x00);
|
||||
rtc_write (RTC_MINUTES_ALARM0, 0x00);
|
||||
rtc_write (RTC_MINUTES_ALARM1, 0x00);
|
||||
rtc_write (RTC_HOURS_ALARM0, 0x00);
|
||||
rtc_write (RTC_HOURS_ALARM1, 0x00);
|
||||
rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
|
||||
rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static unsigned char rtc_read (unsigned char reg)
|
||||
{
|
||||
unsigned char dout[2]; /* SPI Output Data Bytes */
|
||||
unsigned char din[2]; /* SPI Input Data Bytes */
|
||||
|
||||
dout[0] = reg;
|
||||
|
||||
if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
|
||||
return 0;
|
||||
} else {
|
||||
return din[1];
|
||||
}
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static void rtc_write (unsigned char reg, unsigned char val)
|
||||
{
|
||||
unsigned char dout[2]; /* SPI Output Data Bytes */
|
||||
unsigned char din[2]; /* SPI Input Data Bytes */
|
||||
|
||||
dout[0] = 0x80 | reg;
|
||||
dout[1] = val;
|
||||
|
||||
spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
|
||||
}
|
||||
|
||||
#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static unsigned char bcd2bin (unsigned char n)
|
||||
{
|
||||
return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
|
||||
}
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
static unsigned int bin2bcd (unsigned int n)
|
||||
{
|
||||
return (((n / 10) << 4) | (n % 10));
|
||||
}
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user