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83xx/85xx/86xx: LBC register cleanup

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Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Becky Bruce
2010-06-17 11:37:20 -05:00
committed by Kumar Gala
parent 0914f48328
commit f51cdaf191
52 changed files with 317 additions and 499 deletions
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5
nand_spl/board/freescale/mpc8536ds/nand_boot.c
View File

@@ -34,12 +34,11 @@ void board_init_f(ulong bootflag)
int px_spd;
u32 plat_ratio, bus_clk, sys_clk;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
ccsr_lbc_t *lbc = (void *)CONFIG_SYS_MPC85xx_LBC_ADDR;
#if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
/* for FPGA */
out_be32(&lbc->br3, CONFIG_SYS_BR3_PRELIM);
out_be32(&lbc->or3, CONFIG_SYS_OR3_PRELIM);
set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
#else
#error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined
#endif

4
nand_spl/nand_boot_fsl_elbc.c
View File

@@ -32,7 +32,7 @@
static void nand_wait(void)
{
fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
fsl_lbc_t *regs = LBC_BASE_ADDR;
for (;;) {
uint32_t status = in_be32(&regs->ltesr);
@@ -49,7 +49,7 @@ static void nand_wait(void)
static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
{
fsl_lbus_t *regs = (fsl_lbus_t *)(CONFIG_SYS_IMMR + 0x5000);
fsl_lbc_t *regs = LBC_BASE_ADDR;
uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
int large = in_be32(&regs->bank[0].or) & OR_FCM_PGS;
int block_shift = large ? 17 : 14;