831 Commits

Author SHA1 Message Date
Marek Vasut
0c590f80b5 pinctrl: renesas: Convert to IS_ENABLED() macro
Use the IS_ENABLED() macro to reduce amount of #ifdef use in the driver
and improve code coverage. With IS_ENABLED() macro, the code is compiled
and then optimized out, which prevents bitrot.

In case no PFC table matches the SoC in use, do not probe the driver
and instead exit with -ENODEV. This should never happen under normal
conditions, because this would mean the driver DT compatible string
match happened, but the list in probe() cannot match the model listed
in match data associated with the compatible string on which the match
did happen.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 476b886a6f)
2025-12-24 05:17:03 -07:00
Tom Rini
7e1e7c936c Merge branch 'next-pinctrl' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
(cherry picked from commit 2c366eb1cd)
2025-12-24 05:17:03 -07:00
Marek Vasut
c5a91f6cdf pinctrl: renesas: Minimize R8A779H0 V4M PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- INTC/INTC-EX
- MSIOF
- PWM
- SSI

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 545208247d)
2025-12-24 05:17:03 -07:00
Marek Vasut
494f658a1a pinctrl: renesas: Minimize R8A779G0 V4H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit a69f8cb9e2)
2025-12-24 05:17:03 -07:00
Marek Vasut
240229c241 pinctrl: renesas: Minimize R8A779F0 S4 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- INTC-EX
- MSIOF

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 35c5ac0d53)
2025-12-24 05:17:03 -07:00
Marek Vasut
130a454bb8 pinctrl: renesas: Minimize R8A779A0 V3U PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 15c51cc62d)
2025-12-24 05:17:03 -07:00
Marek Vasut
191e4bc8b2 pinctrl: renesas: Minimize R8A77995 D3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 59c9ca0ba3)
2025-12-24 05:17:03 -07:00
Marek Vasut
230c33b0bd pinctrl: renesas: Minimize R8A77990 E3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC/INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 1ee288a6aa)
2025-12-24 05:17:03 -07:00
Marek Vasut
15e21e88cb pinctrl: renesas: Minimize R8A77980 V3H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit fa51edbab6)
2025-12-24 05:17:03 -07:00
Marek Vasut
5eff1bdba4 pinctrl: renesas: Minimize R8A77970 V3M PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit a046f58f33)
2025-12-24 05:17:03 -07:00
Marek Vasut
467c8d995b pinctrl: renesas: Minimize R8A77965 M3-N PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit d020179cf0)
2025-12-24 05:17:03 -07:00
Marek Vasut
4fc1da322f pinctrl: renesas: Minimize R8A77960 M3-W and R8A77961 M3-W+ PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 0edacf1a41)
2025-12-24 05:17:03 -07:00
Marek Vasut
3562dbba19 pinctrl: renesas: Minimize R8A77951 H3 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 2890251ead)
2025-12-24 05:17:03 -07:00
Marek Vasut
3f0325c726 pinctrl: renesas: Minimize R8A7794 E2 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 7f19150405)
2025-12-24 05:17:03 -07:00
Marek Vasut
b359ef763c pinctrl: renesas: Minimize R8A7792 V2H PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- CAN
- DU
- INTC
- MSIOF
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 7db1d1fadf)
2025-12-24 05:17:03 -07:00
Marek Vasut
c95dee1d20 pinctrl: renesas: Minimize R8A7791 M2-W and R8A7793 M2-N PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 6671e9aebd)
2025-12-24 05:17:03 -07:00
Marek Vasut
4d21467c68 pinctrl: renesas: Minimize R8A7790 H2 PFC tables
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:

- Audio
- CAN
- DU
- INTC
- MSIOF
- PWM
- SSI
- VIN

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 2f3bd7ca26)
2025-12-24 05:17:02 -07:00
Marek Vasut
f256c8756a pinctrl: renesas: Add Kconfig symbol for conditional build of full PFC tables
By default the pin multiplexing tables used by U-Boot are reduced
to keep the size of the bootloader low. This option allows build of
full pin multiplexing tables the same way they are included in the
Linux kernel. This includes pin multiplexing options for Audio, CAN,
CANFD, DU, INTC, INTC-EX, MSIOF, PWM, SSI, for which there is no
U-Boot driver. This option is disabled by default.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit e6e3d70632)
2025-12-24 05:17:02 -07:00
Peng Fan
f2bf0f84cc pinctrl: imx93: support i.MX91
Reuse i.MX93 pinctrl driver for i.MX91, because i.MX91 follows same
design as i.MX93 in IOMUXC controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit c22bc4019a)
2025-12-24 05:16:58 -07:00
Marek Vasut
054f352d76 pinctrl: renesas: Fix R-Car spelling
The correct spelling is R-Car, including the dash, update the usage.
Kconfig strings and comment changes only, no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 4380b31e40)
2025-12-17 13:09:43 -07:00
Paul Barker
18a9724ffe pinctrl: rzg2l: Drop unnecessary scope
In rzg2l_pinconf_set(), there are no new variables defined in the case
statement for PIN_CONFIG_INPUT_ENABLE so no additional scope is needed.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 3a735cff5f)
2025-12-17 10:51:23 -07:00
Paul Barker
aaa56cec52 pinctrl: rzg2l: Support Ethernet TXC output enable
On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK
signal is selectable to support an Ethernet PHY operating in either MII
or RGMII mode. By default, the signal is configured as an input and MII
mode is supported. The ETH_MODE register can be modified to configure
this signal as an output to support RGMII mode.

As this signal is be default an input, and can optionally be switched to
an output, it maps neatly onto an `output-enable` property in the device
tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit bba516a772)
2025-12-17 10:51:23 -07:00
Paul Barker
25bd80a657 pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces
The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at
multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V.

rzg2l_pinconf_set() is extended to support the 2.5V setting, with a
check to ensure this is only used on Ethernet interfaces as it is not
supported on the SD & QSPI interfaces.

While we're modifying rzg2l_pinconf_set(), drop the unnecessary default
value for pwr_reg as it is set in every branch of the following if
condition.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 215663f5e4)
2025-12-17 10:51:23 -07:00
Henrik Grimler
c2851e54a1 pinctrl: exynos: fix type of count integer
unsigned int count is used to capture return of dev_read_string_count.
When an error occurs dev_read_string_count returns -ve, which can
hence not be handled correctly. Use int instead of unsigned int so
that errors are detected.

Fixes: 16ca80adc5 ("pinctrl: Add pinctrl driver support for Exynos7420 SoC")

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
(cherry picked from commit e5565c24bb)
2025-12-15 17:22:49 +00:00
Quentin Schulz
76e5878f98 pinctrl: rockchip: constify rockchip_pin_ctrl for RV1108
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
ba9067eefa pinctrl: rockchip: constify rockchip_pin_ctrl for RK3399
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
3157d3a210 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3368
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
e5b4d0422d pinctrl: rockchip: constify rockchip_pin_ctrl for RK3328
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
31d6ef8517 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3308
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
923d64ee29 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3288
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
cddc376c39 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3228
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
21ca6676e4 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3188
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
d34b154044 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3128
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
73fe2498a5 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3066
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
174f53b914 pinctrl: rockchip: constify rockchip_pin_ctrl for RK3036
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
4ba263b86f pinctrl: rockchip: constify rockchip_pin_ctrl for PX30
There's no need to modify private data from the controller, so let's
make that struct const.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:31 +01:00
Quentin Schulz
7b0a5bd9b2 pinctrl: rockchip: fix bank's pin_base computing
The logic in the core reads the nr_pins of the controller and uses it as
the index of the first pin in the bank (pin_base) it currently parses.
It then increments the number of pins in the controller before going to
the next bank.

This works "fine" for controllers where nr_pins isn't defined in their
rockchip_pin_ctrl struct as it defaults to 0. However, when it is
already set, it'll make the index pin of each bank offset by the number
in nr_pins declared in the struct at initialization, and it'll keep
growing while adding banks, which means the total number of pins in the
controller will be misrepresented.

Additionally, U-Boot proper may probe this driver twice (pre-reloc and
true proper) and not reset nr_pins of the controller in-between meaning
the second probe will have an offset of the actual correct nr_pins.

Instead, let's just store locally the number of pins in the controller
and make sure it's reset between probes.

Finally, this stops modifying a const struct which will soon be
triggering a CPU abort at runtime.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-27 05:16:30 +01:00
Steven Liu
194e4c9fdd pinctrl: rockchip: support rk3576 pinctrl
Add support for the rk3576 variant of pinctrl.

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
[adapted to mainline u-boot]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-26 16:20:28 +01:00
Steven Liu
08eaff17ed pinctrl: rockchip: Add support for RK3528
Add pinctrl driver for RK3528.

Imported from vendor U-Boot linux-6.1-stan-rkr5 tag with adjustments
to use regmap_update_bits().

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-26 16:20:27 +01:00
Jonas Karlman
2f491552e8 pinctrl: rockchip: rk3328: Fix pinmux for GPIO2-B and GPIO3-B pins
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.

This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-26 11:35:38 +01:00
Hal Feng
c2953ffbd6 pinctrl: starfive: Correct driver declaration for starfive_gpio
Use the driver macros so that the driver appears in the
linker list.

Reported-by: Simon Glass <sjg@chromium.org>
Fixes: 732f01aabf ("pinctrl: starfive: Add StarFive JH7110 driver")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
2025-05-25 19:01:51 +01:00
Tom Rini
2825b387b0 Kbuild: Always use $(PHASE_)
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-05-01 05:56:48 -06:00
Quentin Schulz
5bc65f5cab pinctrl: rockchip: allow to build for TPL
A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.

Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-11-11 15:14:14 +08:00
Tom Rini
e28e70e392 Merge patch series "Support Aspeed SGPIO controller"
Billy Tsai <billy_tsai@aspeedtech.com> says:

AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
supports up to 80 pins.

Link: https://lore.kernel.org/r/20241016085955.314236-1-billy_tsai@aspeedtech.com
2024-10-29 16:17:47 -06:00
Billy Tsai
4d5510774d ARM: dts: ast2600: Add SGPIO to device tree
Add SGPIO DTS node and enable them for AST2600 EVB.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2024-10-29 12:12:04 -06:00
Billy Tsai
be298254be ARM: dts: ast2500: Add SGPIO to device tree
Add SGPIO DTS node and enable it for AST2500 EVB.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2024-10-29 12:12:04 -06:00
Tim Harvey
59382d2cb9 pinctrl: imx: Convert to use livetree API for fdt access
Convert to using livetree API functions.

Without this if livetree is enabled (OF_LIVE) the imx8mq-pinctrl
driver will (silently) fail to probe causing issues with multiple
devices.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-10-25 09:07:30 -03:00
Tom Rini
96573a1312 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh 2024-10-13 20:25:22 -06:00
Marek Vasut
04395af28f pinctrl: renesas: Synchronize R-Car R8A779H0 V4M PFC tables with Linux 6.10.9
Synchronize R-Car R8A779H0 V4M PFC tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13 23:21:19 +02:00
Marek Vasut
4d84508177 pinctrl: renesas: Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.10.9
Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13 23:21:19 +02:00