df2e7be349
Add support for this new phase, related to VBE, which runs after TPL. It determines the state of the machine, then selects which SPL image to use. SDRAM init is then done in SPL (rather than TPL as normal for Rockchip), so that VBE can update the SDRAM-intit code in the field. Series-changes: 2 - Rewrite help for VPL_ROCKCHIP_COMMON_BOARD - Skip spl-boot-order.c for VPL (rather than modifying it) Series-changes: 4 - Add a value for SPL_STACK_R_ADDR Series-changes: 5 - Expand commit message to mention VBE - Move SUPPORT_VPL next to other SUPPORT_xxx options - Put TPL_DM_MMC in alpha order - Move VPL_ROCKCHIP_COMMON_BOARD up a bit - Move VPL_LDSCRIPT up a bit - Drop config SPL_STACK_R_ADDR - Use if() instead of ? in spl_boot_device() - Drop mention of SPL_RAW_IMAGE_SUPPORT since it is already the default - Drop mention of SPL_SEPARATE_BSS since VPL doesn't need it Signed-off-by: Simon Glass <sjg@chromium.org>
43 lines
769 B
C
43 lines
769 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2012
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* Texas Instruments, <www.ti.com>
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*/
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#ifndef _ASM_SPL_H_
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#define _ASM_SPL_H_
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#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) || \
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defined(CONFIG_ARCH_K3) || defined(CONFIG_ARCH_OMAP2PLUS)
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/* Platform-specific defines */
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#include <asm/arch/spl.h>
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#else
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enum {
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BOOT_DEVICE_RAM,
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BOOT_DEVICE_MMC1,
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BOOT_DEVICE_MMC2,
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BOOT_DEVICE_MMC2_2,
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BOOT_DEVICE_NAND,
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BOOT_DEVICE_ONENAND,
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BOOT_DEVICE_NOR,
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BOOT_DEVICE_UART,
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BOOT_DEVICE_SPI,
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BOOT_DEVICE_USB,
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BOOT_DEVICE_SATA,
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BOOT_DEVICE_I2C,
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BOOT_DEVICE_BOARD,
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BOOT_DEVICE_DFU,
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BOOT_DEVICE_XIP,
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BOOT_DEVICE_BOOTROM,
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BOOT_DEVICE_SMH,
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BOOT_DEVICE_VBE,
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BOOT_DEVICE_NONE
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};
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#endif
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#ifndef CONFIG_DM
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extern gd_t gdata;
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#endif
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#endif
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