8503a36c18
These boards have quite a low BSS limit of 1K. The new dlmalloc needs about 1K of BSS (instead of 2K of data), since its state has moved out of the data region. Increase the limit by 0.5K for these boards: imx8mp_data_modul_edm_sbc imx8mp_dhcom_drc02 imx8mp_dhcom_pdk2 imx8mp_dhcom_pdk3 imx8mp_dhcom_picoitx imx8mp_venice Signed-off-by: Simon Glass <simon.glass@canonical.com>
160 lines
3.7 KiB
Plaintext
160 lines
3.7 KiB
Plaintext
#include <configs/imx_dhsom.config>
|
|
|
|
CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y
|
|
# CONFIG_INPUT is not set
|
|
CONFIG_ARCH_MISC_INIT=y
|
|
CONFIG_BOARD_LATE_INIT=y
|
|
CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset"
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_OF_SYSTEM_SETUP=y
|
|
CONFIG_SUPPORT_RAW_INITRD=y
|
|
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
|
|
CONFIG_SYS_BOOTM_LEN=0x8000000
|
|
CONFIG_SYS_CBSIZE=2048
|
|
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
|
|
CONFIG_SYS_LOAD_ADDR=0x50000000
|
|
CONFIG_SYS_MALLOC_F_LEN=0x18000
|
|
CONFIG_SYS_MALLOC_LEN=0x1000000
|
|
CONFIG_SYS_MONITOR_LEN=1048576
|
|
CONFIG_SYS_PBSIZE=2081
|
|
CONFIG_TEXT_BASE=0x40200000
|
|
CONFIG_USE_BOOTARGS=y
|
|
CONFIG_USE_BOOTCOMMAND=y
|
|
CONFIG_USE_PREBOOT=y
|
|
|
|
# CONFIG_SPL_FIT_IMAGE_TINY is not set
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
|
|
CONFIG_SPL_BOARD_INIT=y
|
|
CONFIG_SPL_BOOTROM_SUPPORT=y
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x600
|
|
CONFIG_SPL_BSS_START_ADDR=0x96fc00
|
|
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x4c000000
|
|
CONFIG_SPL_DM=y
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
|
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
|
|
CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y
|
|
CONFIG_SPL_MAX_SIZE=0x26000
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_SPL_HAVE_INIT_STACK=y
|
|
CONFIG_SPL_STACK=0x96fc00
|
|
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
|
|
CONFIG_SPL_TEXT_BASE=0x920000
|
|
|
|
CONFIG_CONSOLE_MUX=y
|
|
CONFIG_CONS_INDEX=2
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_DEBUG_UART_BASE=0x30860000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
|
|
CONFIG_CMD_EEPROM=y
|
|
CONFIG_CMD_SMC=y
|
|
CONFIG_SPL_I2C=y
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20
|
|
CONFIG_SYS_EEPROM_SIZE=16384
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
|
|
CONFIG_ENV_OFFSET=0xFE0000
|
|
CONFIG_ENV_OFFSET_REDUND=0xFF0000
|
|
CONFIG_ENV_SECT_SIZE=0x1000
|
|
CONFIG_ENV_SIZE=0x10000
|
|
CONFIG_ENV_SPI_MAX_HZ=80000000
|
|
CONFIG_ENV_VARS_UBOOT_CONFIG=y
|
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
CONFIG_NXP_FSPI=y
|
|
CONFIG_SF_DEFAULT_SPEED=50000000
|
|
# CONFIG_SPI_FLASH_UNLOCK_ALL is not set
|
|
|
|
CONFIG_BOOTCOUNT_LIMIT=y
|
|
CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
|
|
|
|
CONFIG_CLK_COMPOSITE_CCF=y
|
|
CONFIG_CLK_IMX8MP=y
|
|
CONFIG_SPL_CLK_COMPOSITE_CCF=y
|
|
CONFIG_SPL_CLK_IMX8MP=y
|
|
|
|
CONFIG_FSL_CAAM=y
|
|
|
|
CONFIG_IMX8M_DRAM_INLINE_ECC=y
|
|
|
|
CONFIG_IMX_BOOTAUX=y
|
|
|
|
CONFIG_DM_PCA953X=y
|
|
CONFIG_SPL_GPIO_HOG=y
|
|
|
|
CONFIG_DM_ETH_PHY=y
|
|
CONFIG_DM_MDIO=y
|
|
CONFIG_DWC_ETH_QOS=y
|
|
CONFIG_DWC_ETH_QOS_IMX=y
|
|
CONFIG_PHY_SMSC=y
|
|
CONFIG_RGMII=y
|
|
|
|
CONFIG_MMC_HS400_ES_SUPPORT=y
|
|
CONFIG_MMC_HS400_SUPPORT=y
|
|
CONFIG_MMC_UHS_SUPPORT=y
|
|
CONFIG_MMC_IO_VOLTAGE=y
|
|
CONFIG_MMC_SPEED_MODE_SET=y
|
|
CONFIG_SPL_MMC_IO_VOLTAGE=y
|
|
CONFIG_SPL_MMC_UHS_SUPPORT=y
|
|
CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_DM_PMIC_PCA9450=y
|
|
CONFIG_DM_REGULATOR_GPIO=y
|
|
CONFIG_DM_REGULATOR_PCA9450=y
|
|
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
|
|
CONFIG_IMX8M_POWER_DOMAIN=y
|
|
CONFIG_POWER_DOMAIN=y
|
|
CONFIG_SPL_DM_PMIC_PCA9450=y
|
|
CONFIG_SPL_DM_REGULATOR=y
|
|
CONFIG_SPL_DM_REGULATOR_PCA9450=y
|
|
CONFIG_SPL_POWER=y
|
|
|
|
CONFIG_PINCTRL_IMX8M=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
|
|
CONFIG_CMD_SPI=y
|
|
CONFIG_DM_MTD=y
|
|
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_SPL_SYSRESET=y
|
|
CONFIG_SYSRESET_PSCI=y
|
|
|
|
CONFIG_DM_RNG=y
|
|
|
|
CONFIG_CMD_GETTIME=y
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_DM_RTC=y
|
|
CONFIG_RTC_M41T62=y
|
|
|
|
CONFIG_CMD_USB_SDP=y
|
|
CONFIG_DM_USB_GADGET=y
|
|
CONFIG_FASTBOOT_BUF_ADDR=0x42800000
|
|
CONFIG_FASTBOOT_BUF_SIZE=0x20000000
|
|
CONFIG_FASTBOOT_FLASH=y
|
|
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
|
CONFIG_PHY_IMX8MQ_USB=y
|
|
CONFIG_USB_DWC3=y
|
|
CONFIG_USB_DWC3_GENERIC=y
|
|
CONFIG_USB_ETHER=y
|
|
CONFIG_USB_ETH_CDC=y
|
|
CONFIG_USB_FUNCTION_ACM=y
|
|
CONFIG_USB_FUNCTION_FASTBOOT=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
|
|
CONFIG_DFU_MMC=y
|
|
CONFIG_DFU_MTD=y
|
|
CONFIG_DFU_RAM=y
|
|
CONFIG_DFU_TFTP=y
|
|
CONFIG_DFU_TIMEOUT=y
|