Resync all defconfig files using qconfig.py Signed-off-by: Simon Glass <sjg@chromium.org>
40 lines
1.1 KiB
Plaintext
40 lines
1.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3528-generic"
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CONFIG_ROCKCHIP_RK3528=y
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CONFIG_SYS_LOAD_ADDR=0xc00800
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CONFIG_DEBUG_UART_BASE=0xFF9F0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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# CONFIG_BOOTMETH_VBE is not set
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3528-generic.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_MAX_SIZE=0x40000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMINFO_MAP=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MISC=y
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_RNG=y
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_OF_UPSTREAM is not set
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_NO_NET=y
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# CONFIG_ADC is not set
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550_MEM32=y
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CONFIG_ERRNO_STR=y
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