Siew Chin Lim 9a5bbdfd1a arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64 ...

Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>

2021-03-08 10:59:10 +08:00

..

ACEX1K.c

…

altera.c

fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

2020-10-09 17:53:12 +08:00

cyclon2.c

…

fpga.c

…

intel_sdm_mb.c

arm: socfpga: soc64: Add ATF support for FPGA reconfig driver

2021-01-15 17:48:37 +08:00

ivm_core.c

…

Kconfig

arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

2021-03-08 10:59:10 +08:00

lattice.c

…

Makefile

fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox

2020-10-09 17:53:12 +08:00

socfpga_arria10.c

image: Adjust the workings of fit_check_format()

2021-02-15 22:31:52 -05:00

socfpga_gen5.c

…

socfpga.c

…

spartan2.c

…

spartan3.c

…

stratixII.c

…

stratixv.c

…

versalpl.c

…

virtex2.c

…

xilinx.c

…

zynqmppl.c

common: Drop asm/global_data.h from common header

2021-02-02 15:33:42 -05:00

zynqpl.c

fpga: zynqpl: fix buffer alignment

2021-02-23 14:56:55 +01:00