1f0943428a
Enable the IO domain on Ringneck. Based on the current HW design, this should do nothing else than making sure vccio6 iodomain is controlled by the GRF and not GPIO0B6. Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
121 lines
3.0 KiB
Plaintext
121 lines
3.0 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_COUNTER_FREQUENCY=24000000
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_SPL_GPIO=y
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_DEFAULT_DEVICE_TREE="rockchip/px30-ringneck-haikou"
|
|
CONFIG_DM_RESET=y
|
|
CONFIG_ROCKCHIP_PX30=y
|
|
# CONFIG_TPL_ROCKCHIP_COMMON_BOARD is not set
|
|
CONFIG_TARGET_RINGNECK_PX30=y
|
|
# CONFIG_TPL_LIBCOMMON_SUPPORT is not set
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
|
CONFIG_DEBUG_UART_BASE=0xFF030000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SYS_LOAD_ADDR=0x800800
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_FIT_SIGNATURE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_BOOTSTD_FULL=y
|
|
CONFIG_LEGACY_IMAGE_FORMAT=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_MISC_INIT_R=y
|
|
CONFIG_SPL_MAX_SIZE=0x20000
|
|
CONFIG_SPL_PAD_TO=0x38000
|
|
CONFIG_SPL_BOARD_INIT=y
|
|
CONFIG_SPL_BOOTROM_SUPPORT=y
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
CONFIG_SPL_SYS_MALLOC=y
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
|
|
CONFIG_SPL_ATF=y
|
|
# CONFIG_TPL_FRAMEWORK is not set
|
|
# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set
|
|
# CONFIG_BOOTM_NETBSD is not set
|
|
# CONFIG_BOOTM_PLAN9 is not set
|
|
# CONFIG_BOOTM_RTEMS is not set
|
|
# CONFIG_CMD_VBE is not set
|
|
# CONFIG_BOOTM_VXWORKS is not set
|
|
# CONFIG_CMD_ELF is not set
|
|
# CONFIG_CMD_LZMADEC is not set
|
|
# CONFIG_CMD_UNZIP is not set
|
|
CONFIG_CMD_BIND=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
# CONFIG_CMD_LOADB is not set
|
|
# CONFIG_CMD_LOADS is not set
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_PMIC=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
CONFIG_CMD_EROFS=y
|
|
CONFIG_CMD_SQUASHFS=y
|
|
# CONFIG_SPL_DOS_PARTITION is not set
|
|
# CONFIG_ISO_PARTITION is not set
|
|
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_LIVE=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
CONFIG_REGMAP=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_SYSCON=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_BUTTON=y
|
|
CONFIG_BUTTON_GPIO=y
|
|
CONFIG_CLK=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_GPIO_HOG=y
|
|
CONFIG_SPL_GPIO_HOG=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MISC=y
|
|
CONFIG_ROCKCHIP_OTP=y
|
|
CONFIG_ROCKCHIP_IODOMAIN=y
|
|
CONFIG_SUPPORT_EMMC_RPMB=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_PHY_TI_GENERIC=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_DM_PMIC=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_REGULATOR_PWM=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_RAM=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_TPL_RAM=y
|
|
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
|
CONFIG_RAM_ROCKCHIP_DDR4=y
|
|
CONFIG_DM_RNG=y
|
|
CONFIG_RNG_ROCKCHIP=y
|
|
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550_MEM32=y
|
|
CONFIG_SOUND=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_DM_THERMAL=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
CONFIG_TPL_TINY_MEMSET=y
|
|
# CONFIG_RSA is not set
|
|
CONFIG_LZO=y
|
|
CONFIG_ERRNO_STR=y
|
|
# CONFIG_EFI_LOADER is not set
|