Manorit Chawdhry 82a53667a7 clk: ti: clk-k3-pll: Change variable name reg to base ...

base is more appropriate for the usage as the variable stores the base
address and seems more accurate w.r.t reg. Change reg to base.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
(cherry picked from commit d6cd643c4e)

2025-12-24 05:16:57 -07:00

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adi

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altera

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analogbits

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aspeed

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at91

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exynos

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imx

imx: imxrt1050-evk: Fix missing clocks for mmc

2024-10-25 20:11:24 -03:00

intel

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mediatek

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meson

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microchip

clk: microchip: mpfs: support new syscon based devicetree configuration

2024-10-29 19:58:22 +08:00

mtmips

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mvebu

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nuvoton

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owl

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qcom

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renesas

clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks

2025-12-19 11:52:45 -07:00

rockchip

clk: rockchip: Add rk3576 clk support

2025-05-26 16:20:28 +01:00

sifive

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sophgo

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starfive

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stm32

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sunxi

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tegra

driver: clk: tegra: init basic clocks on probe

2025-12-18 16:07:29 -07:00

ti

clk: ti: clk-k3-pll: Change variable name reg to base

2025-12-24 05:16:57 -07:00

uniphier

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clk_bcm6345.c

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clk_boston.c

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clk_fixed_factor.c

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clk_fixed_rate.c

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clk_k210.c

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clk_octeon.c

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clk_pic32.c

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clk_sandbox_ccf.c

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clk_sandbox_test.c

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clk_sandbox.c

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clk_scmi.c

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clk_versaclock.c

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clk_versal.c

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clk_vexpress_osc.c

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clk_zynq.c

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clk_zynqmp.c

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clk-cdce9xx.c

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clk-composite.c

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clk-divider.c

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clk-fixed-factor.c

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clk-gate.c

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clk-gpio.c

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clk-hsdk-cgu.c

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clk-mux.c

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clk-uclass.c

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clk-xlnx-clock-wizard.c

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clk.c

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ics8n3qv01.c

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Kconfig

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Makefile

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mpc83xx_clk.c

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mpc83xx_clk.h

clk: mpc83xx: Fix typo in "Coherent System Bus"

2025-12-17 18:35:00 -07:00