rockchip: Set the skip-at-start property correctly
The rockchip image is written to the media at block 64, which is a 32K offset, so set the skip-at-start property to 0x8000 Update CONFIG_SPL_PAD_TO to point to the offset in the image, since Binman is dealing with the 'missing' 32K now. Series-changes: 2 - Move this patch to the end of the series - Drop 0x8000 offset for SPI Series-changes: 5 - Add to VPL file also Series-changes: 6 - Update CONFIG_SPL_PAD_TO for puma-rk3399 and ringneck-px30 Signed-off-by: Simon Glass <sjg@chromium.org>
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@@ -171,6 +171,7 @@
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simple-bin {
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filename = "u-boot-rockchip.bin";
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pad-byte = <0xff>;
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skip-at-start = <0x8000>;
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mkimage {
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filename = "idbloader.img";
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@@ -113,6 +113,7 @@
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simple-bin {
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filename = "u-boot-rockchip.bin";
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pad-byte = <0xff>;
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skip-at-start = <0x8000>;
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alternates-fdt {
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fdt-list-dir = "dts/upstream/src/arm64/rockchip";
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@@ -97,7 +97,7 @@ config SPL_MAX_SIZE
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config SPL_PAD_TO
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hex "Offset to which the SPL should be padded before appending the SPL payload"
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default 0x7f8000 if ARCH_ROCKCHIP
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default 0x800000 if ARCH_ROCKCHIP
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default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
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default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
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default 0x10000 if ARCH_KEYSTONE
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@@ -23,7 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
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CONFIG_CONSOLE_MUX=y
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x2e000
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CONFIG_SPL_PAD_TO=0x38000
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CONFIG_SPL_PAD_TO=0x40000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_I2C=y
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@@ -26,7 +26,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/px30-ringneck-haikou.dtb"
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_MISC_INIT_R=y
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CONFIG_SPL_MAX_SIZE=0x20000
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CONFIG_SPL_PAD_TO=0x38000
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CONFIG_SPL_PAD_TO=0x40000
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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