smallsolar/u-boot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

rockchip: Pull in dtsi updates for dts/upstream

Browse Source 
Some tweaks are needed to keep some of the boards building.
This commit is contained in:
Simon Glass
2025-05-26 16:26:24 +01:00
parent 060002a086
commit a1732401c6
11 changed files with 246 additions and 187 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
arch/arm/dts/rk3288-u-boot.dtsi
View File

@@ -46,30 +46,6 @@
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
&binman {
rom {
filename = "u-boot.rom";
size = <0x400000>;
pad-byte = <0xff>;
mkimage {
args = "-n rk3288 -T rkspi";
u-boot-spl {
};
};
u-boot-img {
offset = <0x20000>;
};
u-boot {
offset = <0x300000>;
};
fdtmap {
};
};
};
#endif
&bus_intmem {
ddr_sram: ddr-sram@1000 {
compatible = "rockchip,rk3288-ddr-sram";

8
arch/arm/dts/rk3288-veyron-u-boot.dtsi
View File

@@ -11,6 +11,14 @@
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE)
&binman {
simple-bin-spi {
size = <0x400000>;
};
};
#endif
&dmc {
logic-supply = <&vdd_logic>;
rockchip,odt-disable-freq = <333000000>;

12
arch/arm/dts/rk3308-rock-s0-u-boot.dtsi
View File

@@ -7,6 +7,14 @@
bootph-some-ram;
};
&gpio4 {
bootph-pre-ram;
};
&sdmmc_2030 {
bootph-pre-ram;
};
&uart0 {
bootph-all;
clock-frequency = <24000000>;
@@ -16,6 +24,10 @@
bootph-all;
};
&vcc_sd {
bootph-pre-ram;
};
&vdd_core {
regulator-init-microvolt = <1015000>;
};

4
arch/arm/dts/rk3328-u-boot.dtsi
View File

@@ -146,6 +146,10 @@
bootph-some-ram;
};
&xin24m {
bootph-all;
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {

31
arch/arm/dts/rk3399-gru-u-boot.dtsi
View File

@@ -15,11 +15,13 @@
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE)
&binman {
rom {
simple-bin-spi {
size = <0x800000>;
};
};
#endif
&cros_ec {
ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
@@ -29,11 +31,35 @@
rockchip,panel = <&edp_panel>;
};
&emmc_phy {
/delete-property/ bootph-pre-ram;
};
&gpio0 {
bootph-pre-ram;
};
&pp1500_ap_io {
bootph-pre-ram;
};
&pp1800_audio {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
&pp1500_en {
bootph-pre-ram;
};
&pp3000 {
bootph-pre-ram;
};
&pp3000_en {
bootph-pre-ram;
};
&ppvar_bigcpu_pwm {
regulator-init-microvolt = <900000>;
};
@@ -80,7 +106,8 @@
&spi1 {
spi_flash: flash@0 {
bootph-all;
bootph-pre-ram;
bootph-some-ram;
};
};

5
arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
View File

@@ -36,3 +36,8 @@
};
};
};
&u2phy1_host {
phy-supply = <&vdd_5v>;
status = "okay";
};

25
arch/arm/dts/rk3399-u-boot.dtsi
View File

@@ -29,31 +29,6 @@
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
&binman {
multiple-images;
rom {
filename = "u-boot.rom";
size = <0x400000>;
pad-byte = <0xff>;
mkimage {
args = "-n rk3399 -T rkspi";
u-boot-spl {
};
};
u-boot-img {
offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
};
u-boot {
offset = <0x300000>;
};
fdtmap {
};
};
};
#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
&cru {
bootph-all;
};

11
arch/arm/dts/rk3566-lckfb-tspi-u-boot.dtsi Normal file
View File

@@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
&rgb_led_r {
default-state = "off";
};
&rgb_led_b {
default-state = "off";
};

2
arch/arm/dts/rk3568-generic.dts
View File

@@ -4,7 +4,7 @@
*/
/dts-v1/;
#include "rk356x.dtsi"
#include "rk356x-base.dtsi"
/ {
model = "Generic RK3566/RK3568";

20
arch/arm/dts/rk3588-orangepi-5-max-u-boot.dtsi Normal file
View File

@@ -0,0 +1,20 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3588-u-boot.dtsi"
&fspim2_pins {
bootph-pre-ram;
bootph-some-ram;
};
&sdhci {
cap-mmc-highspeed;
mmc-hs200-1_8v;
};
&sfc {
flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};

291
arch/arm/dts/rockchip-u-boot.dtsi
View File

@@ -5,6 +5,36 @@
#include <config.h>
#ifdef CONFIG_ARM64
#define FIT_ARCH "arm64"
#else
#define FIT_ARCH "arm"
#endif
#if defined(CONFIG_SPL_GZIP)
#define FIT_UBOOT_COMP "gzip"
#elif defined(CONFIG_SPL_LZMA)
#define FIT_UBOOT_COMP "lzma"
#else
#define FIT_UBOOT_COMP "none"
#endif
/*
* SHA256 should be enabled in SPL when signature validation is involved,
* CRC32 should only be used for basic checksum validation of FIT images.
*/
#if defined(CONFIG_SPL_FIT_SIGNATURE)
#if defined(CONFIG_SPL_SHA256)
#define FIT_HASH_ALGO "sha256"
#elif defined(CONFIG_SPL_CRC32)
#define FIT_HASH_ALGO "crc32"
#endif
#endif
#if defined(CONFIG_SPL_FIT) && (defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE))
#define HAS_FIT
#endif
/ {
binman: binman {
multiple-images;
@@ -13,6 +43,126 @@
#ifdef CONFIG_SPL
&binman {
#ifdef HAS_FIT
fit_template: template-1 {
type = "fit";
#ifdef CONFIG_ARM64
description = "FIT image for U-Boot with bl31 (TF-A)";
#else
description = "FIT image with OP-TEE";
#endif
#address-cells = <1>;
fit,fdt-list = "of-list";
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
fit,align = <512>;
images {
u-boot {
description = "U-Boot";
type = "standalone";
os = "u-boot";
arch = FIT_ARCH;
compression = FIT_UBOOT_COMP;
load = <CONFIG_TEXT_BASE>;
entry = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
compress = FIT_UBOOT_COMP;
};
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
#endif
};
#ifdef CONFIG_ARM64
@atf-SEQ {
fit,operation = "split-elf";
description = "ARM Trusted Firmware";
type = "firmware";
arch = FIT_ARCH;
os = "arm-trusted-firmware";
compression = "none";
fit,load;
fit,entry;
fit,data;
atf-bl31 {
};
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
#endif
};
@tee-SEQ {
fit,operation = "split-elf";
description = "TEE";
type = "tee";
arch = FIT_ARCH;
os = "tee";
compression = "none";
fit,load;
fit,entry;
fit,data;
tee-os {
optional;
};
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
#endif
};
#else /* !CONFIG_ARM64 */
op-tee {
description = "OP-TEE";
type = "tee";
arch = FIT_ARCH;
os = "tee";
compression = "none";
load = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
entry = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
tee-os {
};
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
#endif
};
#endif /* CONFIG_ARM64 */
@fdt-SEQ {
description = "fdt-NAME";
compression = "none";
type = "flat_dt";
#ifdef FIT_HASH_ALGO
hash {
algo = FIT_HASH_ALGO;
};
#endif
};
};
configurations {
default = "@config-DEFAULT-SEQ";
@config-SEQ {
description = "NAME.dtb";
fdt = "fdt-SEQ";
#ifdef CONFIG_ARM64
fit,firmware = "atf-1", "u-boot";
#else
fit,firmware = "op-tee", "u-boot";
#endif
fit,loadables;
fit,compatible;
};
};
};
#endif /* HAS_FIT */
simple-bin {
filename = "u-boot-rockchip.bin";
pad-byte = <0xff>;
@@ -33,143 +183,15 @@
};
};
#if defined(CONFIG_SPL_FIT) && (defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE))
fit: fit {
#ifdef CONFIG_ARM64
description = "FIT image for U-Boot with bl31 (TF-A)";
#else
description = "FIT image with OP-TEE";
#endif
#address-cells = <1>;
fit,fdt-list = "of-list";
#ifdef HAS_FIT
fit {
filename = "u-boot.itb";
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
fit,align = <512>;
offset = <CONFIG_SPL_PAD_TO>;
images {
u-boot {
description = "U-Boot";
type = "standalone";
os = "U-Boot";
#ifdef CONFIG_ARM64
arch = "arm64";
#else
arch = "arm";
#endif
#if defined(CONFIG_SPL_GZIP)
compression = "gzip";
#elif defined(CONFIG_SPL_LZMA)
compression = "lzma";
#else
compression = "none";
#endif
load = <CONFIG_TEXT_BASE>;
entry = <CONFIG_TEXT_BASE>;
u-boot-nodtb {
#if defined(CONFIG_SPL_GZIP)
compress = "gzip";
#elif defined(CONFIG_SPL_LZMA)
compress = "lzma";
#endif
};
#ifdef CONFIG_SPL_FIT_SIGNATURE
hash {
algo = "sha256";
};
#endif
};
#ifdef CONFIG_ARM64
@atf-SEQ {
fit,operation = "split-elf";
description = "ARM Trusted Firmware";
type = "firmware";
arch = "arm64";
os = "arm-trusted-firmware";
compression = "none";
fit,load;
fit,entry;
fit,data;
atf-bl31 {
};
#ifdef CONFIG_SPL_FIT_SIGNATURE
hash {
algo = "sha256";
};
#endif
};
@tee-SEQ {
fit,operation = "split-elf";
description = "TEE";
type = "tee";
arch = "arm64";
os = "tee";
compression = "none";
fit,load;
fit,entry;
fit,data;
tee-os {
optional;
};
#ifdef CONFIG_SPL_FIT_SIGNATURE
hash {
algo = "sha256";
};
#endif
};
#else
op-tee {
description = "OP-TEE";
type = "tee";
arch = "arm";
os = "tee";
compression = "none";
load = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
entry = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
tee-os {
};
#ifdef CONFIG_SPL_FIT_SIGNATURE
hash {
algo = "sha256";
};
#endif
};
#endif
@fdt-SEQ {
description = "fdt-NAME";
compression = "none";
type = "flat_dt";
#ifdef CONFIG_SPL_FIT_SIGNATURE
hash {
algo = "sha256";
};
#endif
};
};
configurations {
default = "@config-DEFAULT-SEQ";
@config-SEQ {
description = "NAME.dtb";
fdt = "fdt-SEQ";
#ifdef CONFIG_ARM64
fit,firmware = "atf-1", "u-boot";
#else
fit,firmware = "op-tee", "u-boot";
#endif
fit,loadables;
};
};
};
insert-template = <&fit_template>;
#else
u-boot-img {
#endif
offset = <CONFIG_SPL_PAD_TO>;
};
#endif
};
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
@@ -193,10 +215,9 @@
};
};
#if defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE)
#ifdef HAS_FIT
fit {
type = "blob";
filename = "u-boot.itb";
insert-template = <&fit_template>;
#else
u-boot-img {
#endif