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mmc: Fix potential timer value truncation

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On 64bit systems the timer value might be truncated to a 32bit value
causing malfunctions. For example on ARM the timer might start from 0
again only after a cold reset. The 32bit overflow occurs after a bit
more than 49 days (1000 Hz counter) so booting after that time may lead
to a surprise because the board might become stuck requiring a cold
reset.

Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
(cherry picked from commit 822afeb7bf)
This commit is contained in:
Ronald Wahl
2024-12-11 21:52:00 +01:00
committed by Simon Glass
parent 093b6347fc
commit f3a162b9cb
1 changed files with 3 additions and 2 deletions
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5
drivers/mmc/mmc.c
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@@ -750,7 +750,7 @@ static int mmc_send_op_cond(struct mmc *mmc)
{
int err, i;
int timeout = 1000;
uint start;
ulong start;
/* Some cards seem to need this */
mmc_go_idle(mmc);
@@ -844,7 +844,8 @@ int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
bool send_status)
{
unsigned int status, start;
ulong start;
unsigned int status;
struct mmc_cmd cmd;
int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS;
bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) &&