Add the display of the STMicroelectronics board identification saved in OTP
in stm32mp2 checkboard function.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Implement the weak function checkboard to identify the used board with
compatible in device tree for the support of stm32mp2 STMicroelectronics
boards.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Activate the command stboard for stm32mp25 STMicroelectronics boards,
add the default used OTP identifier and the associated board identifier:
- stm32mp25xx-ev1 = MB1936
- stm32mp25xx-dk = MB1605
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a function setup_mac_address() to update the MAC address from the
default location in OTP for stm32mp2 platform.
The max number of OTP for MAC address is increased to 8 for STM32MP25,
defined with get_eth_nb() and checked in setup_mac_address.
The MAC address FF:FF:FF:FF:FF:FF, the broadcast ethaddr, is a invalid
value used for unused MAC address slot in OTP, for example for board
with STM32MP25x part number allows up to 5 ethernet ports but it is not
supported by the hardware, without switch; the associated variable
"enetaddr%d" is not created.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add driver data in BSEC driver to test presence of OP-TEE TA,
mandatory for STM32MP13 family and prepare the support of new device
with more OTP than 95.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add BSEC support to STM32MP25 SoC family with SoC information:
- RPN = Device part number (BSEC_OTP_DATA9)
- PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
In SCMI configuration, usart1 is secure, so all its resources are secured
(clock and reset) and can't be set/unset by non-secure world but by OP-TEE.
Fixes: 6cccc8d396 ("ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
What we were doing here amounts to simplifying the code for the new hush
parser, and the workarounds are required when using the old one. As we
have returned to having the old parser be default for now, we must undo
this so that the test passes again.
This reverts commit 6c2f753f4a.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently at least two SoC families are able to cause a crash using
their regular boot scripts, with the new parser. For now, revert to the
old parser as default.
This reverts commit 78912cfde2.
Signed-off-by: Tom Rini <trini@konsulko.com>
In practice, as this test defaults to enabled rather than disabled, too
many platforms now fail.
This reverts commit d836473862.
Signed-off-by: Tom Rini <trini@konsulko.com>
With newer versions of trace-cmd the report subcommand will have
different output from before if we do or do not pass -l. However, with
the -l flag passed our put is consistent here. This updates our regular
expressions and comments for this as well now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Update packaging to be version 23.2 to match our Sphinx requirements.
This will let us build a pip cache out of both of our requirements.txt
files.
Signed-off-by: Tom Rini <trini@konsulko.com>
ACPI support for RISC-V requires a recent QEMU.
Upgrade the used QEMU to v8.2.0.
QEMU commit 0c7ffc977195 ("hw/net: cadence_gem: Fix MDIO_OP_xxx values")
is needed to fix the Ethernet PHY driver used by the emulated SiFive
Unleashed Board emulation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Xilinx changes for v2024.04-rc1-v2
xilinx:
- Enable NFS, WGET, DNS and BLKMAP by default
zynqmp:
- Support new power-management node
- Remove multiple blank lines from DTSes
- Wire multiboot with DFU infrastructure
- Fix i2c-gpio pinctrl group name
- SOM DT changes (phy on kd240, kv260 cleanups
- Cleanup i2c bus on zcu1285
- DT cleanup (fix node names not to use _)
- Fix USB interrupts
- Cleanup zcu100 DT
- Add support for kaslr-seed
zynqmp_r5:
- Fix W=1 issue with missing dir
tools:
- Improve zynqmpimage mkimage support
Documentation:
* add generated index to table of contents
* create index entries for commands
* update Python packages used to build the documentation
* fix typos in dfu documentation
UEFI:
* split unrelated code from efi_bootmgr.c
* rename CONFIG_BOOTEFI_BOOTMGR to CONFIG_EFI_BOOTMGR
* net: tftp: remove explicit EFI configuration dependency
* fs: remove explicit EFI configuration dependency
Other:
* Add Goldfish RTC driver and make it available on RISC-V QEMU
- Add more pytests to exercise functionality on real hardware, cleanup
and add tests around "cp"/memmove, add phyCORE-AM62x and Phytium
Pe2201 platforms, Nuvoton NPCM BMC reset driver and improve QEMU
SMBIOS support
The version of pycryptodomex that we use is vulnerable to this CVE.
While not likely an issue for us, let us upgrade to be on the safe side.
Reported-by: GitHub dependabot
Signed-off-by: Tom Rini <trini@konsulko.com>
Such a config option does not exist. Rephrase, and avoid mentioning
MEM_SUPPORT_64BIT_DATA, which is an implementation detail.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The first sentence is half-way true; the macro is always defined, but
has the value 0 or 1.
The second is outright false. A lot of code guarded by
MEM_SUPPORT_64BIT_DATA uses a "ulong" to store values, so if
sizeof(long) is not 8, that code would probably compile, but not work
at all as expected.
It would probably be possible to make all such code explicitly use u64
and thus make it work on 32 bit targets, but until that is done, do
not pretend that it's ok to override the automatic value of
MEM_SUPPORT_64BIT_DATA.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The macro MEM_SUPPORT_64BIT_DATA is always defined, as either 1 or 0,
so using "#ifdef MEM_SUPPORT_64BIT_DATA" doesn't do what one
expects.
This means that currently all 32 bit targets get compiled with the .q
suffix mentioned in the help text, while it doesn't actually work.
Use the proper "#if" instead.
There's really no point defining another similarly-named macro with
exactly the same value, so just use MEM_SUPPORT_64BIT_DATA throughout.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
QEMU's virt board provides an emulated Goldfish RTC. Enable the driver by
default.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The Goldfish RTC is a virtual device which may be supplied by QEMU.
It is enabled by default on QEMU's RISC-V virt machine.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Now it is clear that the feature actually depends on efi interfaces,
not "bootefi" command. efi_set_bootdev() will automatically be nullified
if necessary efi component is disabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now it is clear that the feature actually depends on efi interfaces,
not "bootefi" command. efi_set_bootdev() will automatically be nullified
if necessary efi component is disabled.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
At this point, EFI boot manager interfaces is fully independent from
bootefi command. So just rename the configuration parameter.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some code moved from cmd/bootefi.c is actually necessary only for "bootefi
<addr>" command (starting an image manually loaded by a user using U-Boot
load commands or other methods (like JTAG debugger).
The code will never been opted out as unused code by a compiler which
doesn't know how EFI boot manager is implemented. So introduce a new
configuration, CONFIG_EFI_BINARY_EXEC, to enforce them opted out
explicitly.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Update requirements.txt to most current packages as produced by
python3 -m pip install six sphinx-rtd-theme sphinx-prompt
python3 -m pip freeze
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reword some sentences, add missing periods and fix various typos in the
dfu documentation.
This was originally contributed on [1]
[1] 9a21ed8ba7
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Just check that the length is at least 2. This allows passing strings
like ".b", which can be convenient when constructing
tests (i.e. parametrizing the suffix used).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This function obviously does not and must not modify "arg". Change the
prototype to allow passing an argument of type "const char*" without
requiring a cast.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Now that the cp command is changed to use memmove() internally, update
the documentation to explicitly state that overlapping regions are
allowed.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
There's no 'mv' shell command for handling overlapping src and dst
regions, and there's no point introducing one, when we can just make
the existing 'cp' command DTRT in all cases. memmove() should at most
be a few instructions more then memcpy() (to detect the appropriate
direction to do the copy), which is of course completely in the noise
with all the string processing that a shell command does.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Add the following memory tests:
memtest_negative - To test mtest command by providing incorrect inputs
memtest_ddr - To test memory write-read-comparision for DDR memory
Signed-off-by: Love Kumar <love.kumar@amd.com>
Add reset controller driver for Nuvoton BMCs.
The npcm reset driver not only supports reset each module reset
but setting initial value of reset Control Registers.
And The driver support each module reset.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
