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Author SHA1 Message Date
Simon Glass
1359c089af pickman: Record cherry-pick of 3 commits from us/next
- 118a10e1dd ARM: renesas: Consistently enable ENV_OVERWRITE on Renesas R-Car
- 70da4f2859 net: rswitch: Do not register disabled ports as ethernet devices
- 0d05bd2058 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
2025-12-19 21:59:14 -07:00
Tom Rini
ce5ae4b69e Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
(cherry picked from commit 0d05bd2058)
2025-12-19 21:59:14 -07:00
Marek Vasut
05d1ee07f7 net: rswitch: Do not register disabled ports as ethernet devices
In case an rswitch port is described as disabled in DT, do not
register it as ethernet device in U-Boot. This way, such ports
cannot be accessed from U-Boot command line.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 70da4f2859)
2025-12-19 21:59:14 -07:00
Marek Vasut
f672720146 ARM: renesas: Consistently enable ENV_OVERWRITE on Renesas R-Car
Move CONFIG_ENV_OVERWRITE=y into commont renesas_rcar.config to make sure
this configuration option is consistently enabled on all of Renesas R-Car
Gen2, Gen3, Gen4. Currently this option is not enabled on Gen4, this fix
corrects that omission.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 118a10e1dd)
2025-12-19 21:59:14 -07:00
Simon Glass
c35b6853b5 Merge branch 'firefly' into 'master'
Lab fixes

See merge request u-boot/u-boot!262
2025-12-20 04:56:22 +00:00
Simon Glass
5ef532deaa test/py: Simplify test_distro_arm_app_efi
The GRUB menu editing approach is fragile because:
1. GRUB can auto-boot before the test interacts with the menu
2. The command line content varies (e.g. '$vt_handoff' vs 'quiet splash')
3. Character-by-character navigation depends on exact screen layout

Simplify to just verify that EFI boot through GRUB reaches Linux
userspace, without trying to edit the kernel command line.

Co-developed-by: Claude <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2025-12-19 21:49:06 -07:00
Simon Glass
c9a5a12248 CI: Remove zybo, samus and samus_tpl from lab
These boards are no longer available in the lab, so drop them from the
CI configuration.

Co-developed-by: Claude <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2025-12-19 21:49:03 -07:00
Simon Glass
652e93b301 test/py: Use longer timeout for lab-mode restart
When restarting U-Boot in lab mode, ensure_spawned() sets the timeout
to TIMEOUT_MS (30 seconds) before calling _wait_for_boot_prompt(). In
lab mode, _wait_for_banner() is skipped, so TIMEOUT_PREPARE_MS is never
restored.

This causes tests that boot into Linux and then restart U-Boot (like
test_distro_script) to fail with a timeout if the board takes more than
30 seconds to reset and boot.

Fix this by setting the timeout to TIMEOUT_PREPARE_MS (3 minutes) at
the start of _wait_for_boot_prompt() when in lab mode.

Co-developed-by: Claude <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2025-12-19 21:48:59 -07:00
Simon Glass
17c5d8d110 arm: dts: rk3399-firefly: Reduce SD card speed for lab
The Firefly-RK3399 board does not boot reliably in the SJG lab due
to signal-integrity issues with SD-wire adapters at higher speeds.

Reduce the SDMMC max-frequency to 25MHz and disable high-speed modes
to improve compatibility.

Co-developed-by: Claude Opus 4.5 <noreply@anthropic.com>
Signed-off-by: Simon Glass <simon.glass@canonical.com>
2025-12-19 21:48:32 -07:00
Simon Glass
cdd549ccc4 Merge branch 'cherry-08806a6e522' into 'master'
[pickman] Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

See merge request u-boot/u-boot!260
2025-12-19 20:03:56 +00:00
Tom Rini
85e0df8559 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Two rswitch fixes and a clock fix

(cherry picked from commit cfe57427c2)
2025-12-19 11:53:09 -07:00
Marek Vasut
0777f608c5 net: rswitch: Add missing cache invalidate of TX descriptor
TFTP transfers of large files, for example 128 MiB, can sporadically
get stuck and the transfer slows down considerably.

This happens because the TX DMA descriptor in DRAM becomes out of sync
with the view of the TX DMA descriptor content from the CPU side, which
is viewed through the CPU caches. In order to guarantee these two views
are consistent, the cache over TX DMA descriptor that has possibly been
written by the rswitch hardware must first be invalidated, only then can
the descriptor be cleared and updated by the CPU, and finally the cache
over that area must be flushed back into DRAM to make sure the rswitch
hardware has consistent view of the updated descriptor content.

The very first invalidation operation was missing, which led to sporadic
corruption of the TX DMA descriptor. Fix it, add the missing invalidation
operation.

Reported-by: Enric Balletbo i Serra <eballetb@redhat.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Enric Balletbo i Serra <eballetb@redhat.com>
(cherry picked from commit fa0f9e83a0)
2025-12-19 11:52:55 -07:00
Marek Vasut
7545b5a4ec net: renesas: Enable TFTP_TSIZE on all Renesas hardware
TFTP transfer size can be used to re-size the TFTP progress bar on
single line based on the server reported file size. Enable it by
default for Renesas hardware to avoid long scrolling walls of '#'
character during long TFTP transfers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 9899a6a750)
2025-12-19 11:52:49 -07:00
Geert Uytterhoeven
3c49c0d730 clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks
Early revisions of the R-Car V4M Series Hardware User’s Manual
contained an incorrect formula for the CPU core clocks:

    ZCnφ = (PLL2VCO x 1/2) x mult/32

Dang-san fixed this by using CLK_PLL2_DIV2 instead of CLK_PLL2 as the
parent clock.

In Rev.0.70 of the documentation, the formula was corrected to:

    ZCnφ = (PLL2VCO x 1/4) x mult/32

As the CPG Block Diagram now shows a separate 1/4 post-divider for PLL2,
the use of CLK_PLL2_DIV2 is a recurring source of confusion.  Hence get
rid of CLK_PLL2_DIV2, and include the proper 1/4 post-divider in the
invocation of the DEF_GEN4_Z() macro, like is done on other R-Car Gen4
(and Gen3) SoCs.

Ported from Linux commit
92850bed9d4d ("clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks")

Reported-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/0d2789cac2bf306145fe0bbf269c2da5942bb68f.1728377724.git.geert+renesas@glider.be
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
(cherry picked from commit 08806a6e52)
2025-12-19 11:52:45 -07:00
Simon Glass
7608e97313 Merge branch 'cherry-93783071365' into 'master'
[pickman] Merge tag 'xilinx-for-v2025.01-rc5-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

See merge request u-boot/u-boot!259
2025-12-19 18:49:01 +00:00
11 changed files with 65 additions and 69 deletions

View File

@@ -782,17 +782,6 @@ pcduino3_nano:
ROLE: pcduino3_nano
<<: *lab_dfn
samus:
variables:
ROLE: samus
<<: *lab_dfn
# chromebook_samus_tpl
samus_tpl:
variables:
ROLE: samus_tpl
<<: *lab_dfn
link:
variables:
ROLE: link
@@ -927,11 +916,6 @@ rpi5:
ROLE: rpi5
<<: *lab_dfn
zybo:
variables:
ROLE: zybo
<<: *lab_dfn
qemu-x86_64:
variables:
ROLE: qemu-x86_64

View File

@@ -732,3 +732,46 @@ The build completed successfully. Let me provide a summary:
---
## 2025-12-19: us/next
Branch: cherry-118a10e1dde
Commits:
- 118a10e1dde ARM: renesas: Consistently enable ENV_OVERWRITE on Renesas R-Car
- 70da4f28592 net: rswitch: Do not register disabled ports as ethernet devices
- 0d05bd2058b Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
### Conversation log
The repository is clean. Now let me create and checkout the new branch based on ci/master:
Now let me cherry-pick the first commit:
First commit cherry-picked successfully. Now the second commit:
Second commit cherry-picked successfully. Now the third commit which is a merge commit:
The merge commit is empty (expected since the parent commits were already cherry-picked). Let me commit it as an empty commit to preserve the merge message:
All three commits cherry-picked successfully. Let me verify with git log:
All 3 commits are present. Now let me run the build verification:
## Final Status
**Cherry-pick Summary:**
- ✅ All 3 commits successfully cherry-picked to branch `cherry-118a10e1dde`
| Commit | Subject | Status |
|--------|---------|--------|
| 118a10e1dde | ARM: renesas: Consistently enable ENV_OVERWRITE on Renesas R-Car | ✅ Cherry-picked |
| 70da4f28592 | net: rswitch: Do not register disabled ports as ethernet devices | ✅ Cherry-picked |
| 0d05bd2058b | Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh | ✅ Cherry-picked (empty commit) |
**Build Result:** ✅ **OK** - 1 board built successfully, no warnings or errors
**Fix-ups Made:** None - all cherry-picks applied cleanly
**Branch Status:** `cherry-118a10e1dde` is ready for pushing, 3 commits ahead of `ci/master`
---

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@@ -6,6 +6,12 @@
#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
&sdmmc {
max-frequency = <25000000>; /* 25MHz for SD-wire compatibility */
/delete-property/ cap-sd-highspeed;
/delete-property/ cap-mmc-highspeed;
};
&vdd_log {
regulator-init-microvolt = <950000>;
};

View File

@@ -17,6 +17,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SPI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_ENV_OVERWRITE=y
CONFIG_FIT=y
CONFIG_HUSH_PARSER=y
CONFIG_MTD=y

View File

@@ -14,7 +14,6 @@ CONFIG_CMD_USB=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_ENV_SIZE=0x40000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y

View File

@@ -2,5 +2,4 @@
CONFIG_BITBANGMII=y
CONFIG_BITBANGMII_MULTI=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_PBSIZE=2068

View File

@@ -39,7 +39,6 @@ enum clk_ids {
CLK_PLL6,
CLK_PLL7,
CLK_PLL1_DIV2,
CLK_PLL2_DIV2,
CLK_PLL3_DIV2,
CLK_PLL4_DIV2,
CLK_PLL4_DIV5,
@@ -82,7 +81,6 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = {
DEF_BASE(".pll7", CLK_PLL7, CLK_TYPE_GEN4_PLL7, CLK_MAIN),
DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
DEF_FIXED(".pll2_div2", CLK_PLL2_DIV2, CLK_PLL2, 2, 1),
DEF_FIXED(".pll3_div2", CLK_PLL3_DIV2, CLK_PLL3, 2, 1),
DEF_FIXED(".pll4_div2", CLK_PLL4_DIV2, CLK_PLL4, 2, 1),
DEF_FIXED(".pll4_div5", CLK_PLL4_DIV5, CLK_PLL4, 5, 1),
@@ -106,10 +104,10 @@ static const struct cpg_core_clk r8a779h0_core_clks[] = {
DEF_RATE(".oco", CLK_OCO, 32768),
/* Core Clock Outputs */
DEF_GEN4_Z("zc0", R8A779H0_CLK_ZC0, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 0),
DEF_GEN4_Z("zc1", R8A779H0_CLK_ZC1, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 8),
DEF_GEN4_Z("zc2", R8A779H0_CLK_ZC2, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 32),
DEF_GEN4_Z("zc3", R8A779H0_CLK_ZC3, CLK_TYPE_GEN4_Z, CLK_PLL2_DIV2, 2, 40),
DEF_GEN4_Z("zc0", R8A779H0_CLK_ZC0, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 0),
DEF_GEN4_Z("zc1", R8A779H0_CLK_ZC1, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 8),
DEF_GEN4_Z("zc2", R8A779H0_CLK_ZC2, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 32),
DEF_GEN4_Z("zc3", R8A779H0_CLK_ZC3, CLK_TYPE_GEN4_Z, CLK_PLL2, 4, 40),
DEF_FIXED("s0d2", R8A779H0_CLK_S0D2, CLK_S0, 2, 1),
DEF_FIXED("s0d3", R8A779H0_CLK_S0D3, CLK_S0, 3, 1),
DEF_FIXED("s0d4", R8A779H0_CLK_S0D4, CLK_S0, 4, 1),

View File

@@ -837,6 +837,7 @@ static int rswitch_send(struct udevice *dev, void *packet, int len)
/* Update TX descriptor */
rswitch_flush_dcache((uintptr_t)packet, len);
rswitch_invalidate_dcache((uintptr_t)desc, sizeof(*desc));
memset(desc, 0x0, sizeof(*desc));
desc->die_dt = DT_FSINGLE;
desc->info_ds = len;
@@ -1112,6 +1113,9 @@ static int rswitch_bind(struct udevice *parent)
return -ENOENT;
ofnode_for_each_subnode(node, ports_np) {
if (!ofnode_is_enabled(node))
continue;
ret = device_bind_with_driver_data(parent, drv,
ofnode_get_name(node),
(ulong)priv, node, &dev);

View File

@@ -90,7 +90,7 @@ config TFTP_WINDOWSIZE
config TFTP_TSIZE
bool "Track TFTP transfers based on file size option"
depends on CMD_TFTPBOOT
default y if (ARCH_OMAP2PLUS || ARCH_K3)
default y if (ARCH_OMAP2PLUS || ARCH_K3 || ARCH_RENESAS)
help
By default, TFTP progress bar is increased for each received UDP
frame, which can lead into long time being spent for sending

View File

@@ -309,6 +309,8 @@ class ConsoleBase():
try:
self.log.info('Waiting for U-Boot to be ready')
if self.lab_mode:
self.timeout = TIMEOUT_PREPARE_MS
if not self.lab_mode:
self._wait_for_banner(loop_num)
self.u_boot_version_string = self.after

View File

@@ -105,49 +105,9 @@ def test_distro_arm_app_efi(ubman):
ubman.expect(
["Booting bootflow 'efi_media_1.bootdev.part_1' with efi"])
# Press Escape to force GRUB to appear, even if the silent menu was
# enabled by a previous boot. If the menu is already set to appear, this
# will exit to the grub> prompt
ubman.send('\x1b')
# Press Escape again, to force it to the grub> prompt
ubman.send('\x1b')
# Wait until we see the editor appear
with ubman.log.section('grub'):
ubman.expect(['grub>'])
ubman.run_command('normal', wait_for_prompt=False)
ubman.expect(['ESC to return previous'])
# Press 'e' to edit the command line
ubman.log.info("Pressing 'e'")
ubman.send('e')
for _ in range(10):
ubman.ctrl('N')
expected = '\tlinux\t/boot/vmlinuz-6.14.0-27-generic '
expected += 'root=UUID=e5665fb4-e1de-4335-86da-357ad5422319 ro '
for _ in expected:
ubman.ctrl('F')
to_erase = 'quiet splash'
for _ in to_erase:
ubman.ctrl('D')
ubman.ctrl('X')
ubman.expect(['Booting a command list'])
with ubman.log.section('exit boot-services'):
ubman.expect(['EFI stub: Exiting boot services...'])
ubman.log.info("boot")
ubman.expect(['Booting Linux on physical CPU'])
with ubman.log.section('initrd'):
ubman.expect(['Freeing initrd memory:'])
ubman.expect(['Run /init as init process'])
with ubman.temporary_timeout(200 * 1000):
ubman.expect(['Ubuntu 25.04 qarm ttyAMA0'])
# Wait for Linux to boot to userspace (kernel may be quiet)
with ubman.log.section('Linux'):
with ubman.temporary_timeout(200 * 1000):
ubman.expect(['Ubuntu 25.04 qarm ttyAMA0'])
ubman.restart_uboot()