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sand ... x86a

Author SHA1 Message Date
Simon Glass
5cec2cfd35 x86: Avoid adding two SPL binaries to the image
At present two separate SPL binaries are included in the ROM. This
affects QEMU which is quite tight with only a 2MB ROM. Adjust the
image description so that space is not wasted when microcode is not
needed.

Series-to: u-boot
Signed-off-by: Simon Glass <sjg@chromium.org>
2025-05-24 08:06:27 -06:00
3 changed files with 8 additions and 2 deletions

View File

@@ -75,7 +75,7 @@ config SANDBOX_BITS_PER_LONG
config SYS_FDT_LOAD_ADDR
hex "Address at which to load devicetree"
default 0x180000
default 0x100
help
With sandbox the devicetree is loaded into the emulated RAM. This sets
the address that is used. There must be enough space at this address

View File

@@ -48,11 +48,17 @@
};
#elif defined(CONFIG_SPL)
u-boot-spl-with-ucode-ptr {
no-expanded;
offset = <CONFIG_X86_OFFSET_SPL>;
};
# ifdef CONFIG_HAVE_MICROCODE
u-boot-dtb-with-ucode2 {
type = "u-boot-dtb-with-ucode";
};
#else
u-boot-spl-dtb {
};
# endif
u-boot {
offset = <CONFIG_X86_OFFSET_U_BOOT>;
};

View File

@@ -658,11 +658,11 @@ that are mapped into that memory:
======== ======================== ===============================
Addr Config Usage
======== ======================== ===============================
100 CONFIG_SYS_FDT_LOAD_ADDR Device tree
b000 CONFIG_BLOBLIST_ADDR Blob list
10000 CFG_MALLOC_F_ADDR Early memory allocation
f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer
100000 TCG Event log TCG Event Log
180000CONFIG_SYS_FDT_LOAD_ADDR Device tree
200000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used
400000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only)
10000000 PCI address space (see test.dts)